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Change the generation of the vmuluwm instruction to be based on the MUL opcode.
[oota-llvm.git]
/
test
/
CodeGen
/
PowerPC
/
stfiwx.ll
diff --git
a/test/CodeGen/PowerPC/stfiwx.ll
b/test/CodeGen/PowerPC/stfiwx.ll
index 588e44fb28d318e480319c5b193de98c8a19895a..5f90dcad032d02d4312e5e77cb9022471a9f1bf8 100644
(file)
--- a/
test/CodeGen/PowerPC/stfiwx.ll
+++ b/
test/CodeGen/PowerPC/stfiwx.ll
@@
-22,8
+22,8
@@
define void @test1(float %a, i32* %b) nounwind {
define void @test2(float %a, i32* %b, i32 %i) nounwind {
; CHECK-LABEL: @test2
; CHECK-LS-LABEL: @test2
define void @test2(float %a, i32* %b, i32 %i) nounwind {
; CHECK-LABEL: @test2
; CHECK-LS-LABEL: @test2
- %tmp.2 = getelementptr i32* %b, i32 1 ; <i32*> [#uses=1]
- %tmp.5 = getelementptr i32* %b, i32 %i ; <i32*> [#uses=1]
+ %tmp.2 = getelementptr i32
, i32
* %b, i32 1 ; <i32*> [#uses=1]
+ %tmp.5 = getelementptr i32
, i32
* %b, i32 %i ; <i32*> [#uses=1]
%tmp.7 = fptosi float %a to i32 ; <i32> [#uses=3]
store i32 %tmp.7, i32* %tmp.5
store i32 %tmp.7, i32* %tmp.2
%tmp.7 = fptosi float %a to i32 ; <i32> [#uses=3]
store i32 %tmp.7, i32* %tmp.5
store i32 %tmp.7, i32* %tmp.2