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Allow x86 mov instructions to/from memory with absolute address to be encoded and...
[oota-llvm.git]
/
test
/
Feature
/
cfgstructures.ll
diff --git
a/test/Feature/cfgstructures.ll
b/test/Feature/cfgstructures.ll
index b16af47af1c427989a51bb2aa7b523a193e8bf15..e667f6d7582fb0f6378a5ef6840dfa7f71ccd825 100644
(file)
--- a/
test/Feature/cfgstructures.ll
+++ b/
test/Feature/cfgstructures.ll
@@
-1,57
+1,53
@@
-; RUN: llvm-
upgrade < %s | llvm-a
s | llvm-dis > %t1.ll
+; RUN: llvm-
as < %
s | llvm-dis > %t1.ll
; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
; RUN: diff %t1.ll %t2.ll
; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
; RUN: diff %t1.ll %t2.ll
-implementation
-
;; This is an irreducible flow graph
;; This is an irreducible flow graph
+define void @irreducible(i1 %cond) {
+ br i1 %cond, label %X, label %Y
+X: ; preds = %Y, %0
+ br label %Y
-void "irreducible"(bool %cond)
-begin
- br bool %cond, label %X, label %Y
-
-X:
- br label %Y
-Y:
- br label %X
-end
+Y: ; preds = %X, %0
+ br label %X
+}
;; This is a pair of loops that share the same header
;; This is a pair of loops that share the same header
+define void @sharedheader(i1 %cond) {
+ br label %A
+
+A: ; preds = %Y, %X, %0
+ br i1 %cond, label %X, label %Y
+
+X: ; preds = %A
+ br label %A
-void "sharedheader"(bool %cond)
-begin
- br label %A
-A:
- br bool %cond, label %X, label %Y
+Y: ; preds = %A
+ br label %A
+}
-X:
- br label %A
-Y:
- br label %A
-end
;; This is a simple nested loop
;; This is a simple nested loop
-void "nested"(bool %cond1, bool %cond2, bool %cond3)
-begin
- br label %Loop1
+define void @nested(i1 %cond1, i1 %cond2, i1 %cond3) {
+ br label %Loop1
-Loop1:
- br label %Loop2
+Loop1:
; preds = %L2Exit, %0
+
br label %Loop2
-Loop2:
- br label %Loop3
+Loop2:
; preds = %L3Exit, %Loop1
+
br label %Loop3
-Loop3:
-
br bool
%cond3, label %Loop3, label %L3Exit
+Loop3:
; preds = %Loop3, %Loop2
+
br i1
%cond3, label %Loop3, label %L3Exit
-L3Exit:
-
br bool
%cond2, label %Loop2, label %L2Exit
+L3Exit:
; preds = %Loop3
+
br i1
%cond2, label %Loop2, label %L2Exit
-L2Exit:
-
br bool
%cond1, label %Loop1, label %L1Exit
+L2Exit:
; preds = %L3Exit
+
br i1
%cond1, label %Loop1, label %L1Exit
-L1Exit:
- ret void
-end
+L1Exit:
; preds = %L2Exit
+
ret void
+}