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Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl...
[oota-llvm.git]
/
test
/
Integer
/
instructions_bt.ll
diff --git
a/test/Integer/instructions_bt.ll
b/test/Integer/instructions_bt.ll
index e10fe9e3dd0a2cf7f892c0980d29516315cefafb..7ca58903527926f85acc4566b001e485905255e5 100644
(file)
--- a/
test/Integer/instructions_bt.ll
+++ b/
test/Integer/instructions_bt.ll
@@
-3,23
+3,23
@@
; RUN: diff %t1.ll %t2.ll
; RUN: diff %t1.ll %t2.ll
-define i39
%
test_extractelement(<4 x i39> %V) {
+define i39
@
test_extractelement(<4 x i39> %V) {
%R = extractelement <4 x i39> %V, i32 1
ret i39 %R
}
%R = extractelement <4 x i39> %V, i32 1
ret i39 %R
}
-define <4 x i39>
%
test_insertelement(<4 x i39> %V) {
+define <4 x i39>
@
test_insertelement(<4 x i39> %V) {
%R = insertelement <4 x i39> %V, i39 0, i32 0
ret <4 x i39> %R
}
%R = insertelement <4 x i39> %V, i39 0, i32 0
ret <4 x i39> %R
}
-define <4 x i39>
%
test_shufflevector_u(<4 x i39> %V) {
+define <4 x i39>
@
test_shufflevector_u(<4 x i39> %V) {
%R = shufflevector <4 x i39> %V, <4 x i39> %V,
<4 x i32> < i32 1, i32 undef, i32 7, i32 2>
ret <4 x i39> %R
}
%R = shufflevector <4 x i39> %V, <4 x i39> %V,
<4 x i32> < i32 1, i32 undef, i32 7, i32 2>
ret <4 x i39> %R
}
-define <4 x float>
%
test_shufflevector_f(<4 x float> %V) {
+define <4 x float>
@
test_shufflevector_f(<4 x float> %V) {
%R = shufflevector <4 x float> %V, <4 x float> undef,
<4 x i32> < i32 1, i32 undef, i32 7, i32 2>
ret <4 x float> %R
%R = shufflevector <4 x float> %V, <4 x float> undef,
<4 x i32> < i32 1, i32 undef, i32 7, i32 2>
ret <4 x float> %R