+define i32 @test1(i32 %A) {
+; CHECK: @test1
+; CHECK-NEXT: ret i32 0
+ %B = srem i32 %A, 1 ; ISA constant 0
+ ret i32 %B
+}
+
+define i32 @test2(i32 %A) { ; 0 % X = 0, we don't need to preserve traps
+; CHECK: @test2
+; CHECK-NEXT: ret i32 0
+ %B = srem i32 0, %A
+ ret i32 %B
+}
+
+define i32 @test3(i32 %A) {
+; CHECK: @test3
+; CHECK-NEXT: [[AND:%.*]] = and i32 %A, 7
+; CHECK-NEXT: ret i32 [[AND]]
+ %B = urem i32 %A, 8
+ ret i32 %B
+}
+
+define i1 @test3a(i32 %A) {
+; CHECK: @test3a
+; CHECK-NEXT: [[AND:%.*]] = and i32 %A, 7
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: ret i1 [[CMP]]
+ %B = srem i32 %A, -8
+ %C = icmp ne i32 %B, 0
+ ret i1 %C
+}
+
+define i32 @test4(i32 %X, i1 %C) {
+; CHECK: @test4
+; CHECK-NEXT: [[SEL:%.*]] = select i1 %C, i32 0, i32 7
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[SEL]], %X
+ %V = select i1 %C, i32 1, i32 8
+ %R = urem i32 %X, %V
+ ret i32 %R
+}
+
+define i32 @test5(i32 %X, i8 %B) {
+; CHECK: @test5
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 %B to i32
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 32, [[ZEXT]]
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SHL]], -1
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD]], %X
+; CHECK-NEXT: ret i32 [[AND]]
+ %shift.upgrd.1 = zext i8 %B to i32
+ %Amt = shl i32 32, %shift.upgrd.1
+ %V = urem i32 %X, %Amt
+ ret i32 %V
+}
+
+define i32 @test6(i32 %A) {
+; CHECK: @test6
+; CHECK-NEXT: ret i32 undef
+ %B = srem i32 %A, 0 ;; undef
+ ret i32 %B
+}