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Generalize some alias analysis logic from atomic
[oota-llvm.git]
/
utils
/
TableGen
/
CodeEmitterGen.cpp
diff --git
a/utils/TableGen/CodeEmitterGen.cpp
b/utils/TableGen/CodeEmitterGen.cpp
index e2278ad62ca4445bd6103deca89e9cbced655bea..ae4a6aa445b1ca0f80316202f0a61b2f0751f8e5 100644
(file)
--- a/
utils/TableGen/CodeEmitterGen.cpp
+++ b/
utils/TableGen/CodeEmitterGen.cpp
@@
-100,8
+100,6
@@
void CodeEmitterGen::run(std::ostream &o) {
const CodeGenInstruction *CGI = *IN;
Record *R = CGI->TheDef;
const CodeGenInstruction *CGI = *IN;
Record *R = CGI->TheDef;
- if (IN != NumberedInstructions.begin()) o << ",\n";
-
if (R->getName() == "PHI" ||
R->getName() == "INLINEASM" ||
R->getName() == "DBG_LABEL" ||
if (R->getName() == "PHI" ||
R->getName() == "INLINEASM" ||
R->getName() == "DBG_LABEL" ||
@@
-112,7
+110,7
@@
void CodeEmitterGen::run(std::ostream &o) {
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG") {
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG") {
- o << " 0U";
+ o << " 0U
,\n
";
continue;
}
continue;
}
@@
-125,9
+123,9
@@
void CodeEmitterGen::run(std::ostream &o) {
Value |= B->getValue() << (e-i-1);
}
}
Value |= B->getValue() << (e-i-1);
}
}
- o << " " << Value << "U";
+ o << " " << Value << "U
," << '\t' << "// " << R->getName() << "\n
";
}
}
- o << "\n };\n";
+ o << "
0U
\n };\n";
// Map to accumulate all the cases.
std::map<std::string, std::vector<std::string> > CaseMap;
// Map to accumulate all the cases.
std::map<std::string, std::vector<std::string> > CaseMap;
@@
-193,7
+191,7
@@
void CodeEmitterGen::run(std::ostream &o) {
gotOp = true;
}
gotOp = true;
}
- unsigned opMask =
(1 << N) - 1
;
+ unsigned opMask =
~0U >> (32-N)
;
int opShift = beginVarBit - N + 1;
opMask <<= opShift;
opShift = beginInstBit - beginVarBit;
int opShift = beginVarBit - N + 1;
opMask <<= opShift;
opShift = beginInstBit - beginVarBit;