+ /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
+ /// specified physical register.
+ std::vector<unsigned char> getRegisterVTs(Record *R) const;
+
+ const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
+ if (LegalValueTypes.empty()) ReadLegalValueTypes();
+ return LegalValueTypes;
+ }
+
+ /// isLegalValueType - Return true if the specified value type is natively
+ /// supported by the target (i.e. there are registers that directly hold it).
+ bool isLegalValueType(MVT::SimpleValueType VT) const {
+ const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
+ for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
+ if (LegalVTs[i] == VT) return true;
+ return false;
+ }
+
+ /// getInstructions - Return all of the instructions defined for this target.
+ ///
+ const std::map<std::string, CodeGenInstruction> &getInstructions() const {
+ if (Instructions.empty()) ReadInstructions();
+ return Instructions;
+ }
+ std::map<std::string, CodeGenInstruction> &getInstructions() {
+ if (Instructions.empty()) ReadInstructions();
+ return Instructions;
+ }
+
+ CodeGenInstruction &getInstruction(const std::string &Name) const {
+ const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
+ assert(Insts.count(Name) && "Not an instruction!");
+ return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
+ }
+
+ typedef std::map<std::string,
+ CodeGenInstruction>::const_iterator inst_iterator;
+ inst_iterator inst_begin() const { return getInstructions().begin(); }
+ inst_iterator inst_end() const { return Instructions.end(); }
+
+ /// getInstructionsByEnumValue - Return all of the instructions defined by the
+ /// target, ordered by their enum value.
+ void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
+ &NumberedInstructions);