+ if (PredicateCheck.empty()) {
+ assert(!HasPred &&
+ "Multiple instructions match, at least one has "
+ "a predicate and at least one doesn't!");
+ } else {
+ OS << " if (" + PredicateCheck + ") {\n";
+ OS << " ";
+ HasPred = true;
+ }
+
+ for (unsigned i = 0; i < Memo.PhysRegs->size(); ++i) {
+ if ((*Memo.PhysRegs)[i] != "")
+ OS << " TII.copyRegToReg(*MBB, MBB->end(), "
+ << (*Memo.PhysRegs)[i] << ", Op" << i << ", "
+ << "TM.getRegisterInfo()->getPhysicalRegisterRegClass("
+ << (*Memo.PhysRegs)[i] << "), "
+ << "MRI.getRegClass(Op" << i << "));\n";
+ }
+
+ OS << " return FastEmitInst_";
+ if (Memo.SubRegNo == (unsigned char)~0) {
+ Operands.PrintManglingSuffix(OS, *Memo.PhysRegs);
+ OS << "(" << InstNS << Memo.Name << ", ";
+ OS << InstNS << Memo.RC->getName() << "RegisterClass";
+ if (!Operands.empty())
+ OS << ", ";
+ Operands.PrintArguments(OS, *Memo.PhysRegs);
+ OS << ");\n";
+ } else {
+ OS << "extractsubreg(" << getName(RetVT);
+ OS << ", Op0, ";
+ OS << (unsigned)Memo.SubRegNo;
+ OS << ");\n";
+ }
+
+ if (HasPred)
+ OS << " }\n";
+
+ }
+ // Return 0 if none of the predicates were satisfied.
+ if (HasPred)
+ OS << " return 0;\n";
+ OS << "}\n";
+ OS << "\n";
+ }
+
+ // Emit one function for the type that demultiplexes on return type.
+ OS << "unsigned FastEmit_"
+ << getLegalCName(Opcode) << "_"
+ << getLegalCName(getName(VT)) << "_";
+ Operands.PrintManglingSuffix(OS);
+ OS << "(MVT::SimpleValueType RetVT";
+ if (!Operands.empty())
+ OS << ", ";
+ Operands.PrintParameters(OS);
+ OS << ") {\nswitch (RetVT) {\n";
+ for (RetPredMap::const_iterator RI = RM.begin(), RE = RM.end();
+ RI != RE; ++RI) {
+ MVT::SimpleValueType RetVT = RI->first;
+ OS << " case " << getName(RetVT) << ": return FastEmit_"
+ << getLegalCName(Opcode) << "_" << getLegalCName(getName(VT))
+ << "_" << getLegalCName(getName(RetVT)) << "_";
+ Operands.PrintManglingSuffix(OS);
+ OS << "(";
+ Operands.PrintArguments(OS);
+ OS << ");\n";
+ }
+ OS << " default: return 0;\n}\n}\n\n";
+
+ } else {
+ // Non-variadic return type.
+ OS << "unsigned FastEmit_"
+ << getLegalCName(Opcode) << "_"
+ << getLegalCName(getName(VT)) << "_";
+ Operands.PrintManglingSuffix(OS);
+ OS << "(MVT::SimpleValueType RetVT";
+ if (!Operands.empty())
+ OS << ", ";
+ Operands.PrintParameters(OS);
+ OS << ") {\n";
+
+ OS << " if (RetVT != " << getName(RM.begin()->first)
+ << ")\n return 0;\n";
+
+ const PredMap &PM = RM.begin()->second;
+ bool HasPred = false;
+
+ // Emit code for each possible instruction. There may be
+ // multiple if there are subtarget concerns.
+ for (PredMap::const_iterator PI = PM.begin(), PE = PM.end(); PI != PE;
+ ++PI) {
+ std::string PredicateCheck = PI->first;
+ const InstructionMemo &Memo = PI->second;
+
+ if (PredicateCheck.empty()) {
+ assert(!HasPred &&
+ "Multiple instructions match, at least one has "
+ "a predicate and at least one doesn't!");
+ } else {
+ OS << " if (" + PredicateCheck + ") {\n";
+ OS << " ";
+ HasPred = true;
+ }
+
+ for (unsigned i = 0; i < Memo.PhysRegs->size(); ++i) {
+ if ((*Memo.PhysRegs)[i] != "")
+ OS << " TII.copyRegToReg(*MBB, MBB->end(), "
+ << (*Memo.PhysRegs)[i] << ", Op" << i << ", "
+ << "TM.getRegisterInfo()->getPhysicalRegisterRegClass("
+ << (*Memo.PhysRegs)[i] << "), "
+ << "MRI.getRegClass(Op" << i << "));\n";
+ }
+
+ OS << " return FastEmitInst_";
+
+ if (Memo.SubRegNo == (unsigned char)~0) {
+ Operands.PrintManglingSuffix(OS, *Memo.PhysRegs);
+ OS << "(" << InstNS << Memo.Name << ", ";
+ OS << InstNS << Memo.RC->getName() << "RegisterClass";
+ if (!Operands.empty())
+ OS << ", ";
+ Operands.PrintArguments(OS, *Memo.PhysRegs);
+ OS << ");\n";
+ } else {
+ OS << "extractsubreg(RetVT, Op0, ";
+ OS << (unsigned)Memo.SubRegNo;
+ OS << ");\n";
+ }
+
+ if (HasPred)
+ OS << " }\n";
+ }
+
+ // Return 0 if none of the predicates were satisfied.
+ if (HasPred)
+ OS << " return 0;\n";
+ OS << "}\n";
+ OS << "\n";
+ }