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ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q
[oota-llvm.git]
/
utils
/
TableGen
/
X86DisassemblerTables.cpp
diff --git
a/utils/TableGen/X86DisassemblerTables.cpp
b/utils/TableGen/X86DisassemblerTables.cpp
index 76ea32034fcd9b4625fdb2b4bc436e438ee16da3..94797f55f7133b967ac92b3a4039ee46aaced518 100644
(file)
--- a/
utils/TableGen/X86DisassemblerTables.cpp
+++ b/
utils/TableGen/X86DisassemblerTables.cpp
@@
-161,7
+161,7
@@
void DisassemblerTables::emitOneID(raw_ostream &o,
/// @param i - The indentation level for that output stream.
static void emitEmptyTable(raw_ostream &o, uint32_t &i)
{
/// @param i - The indentation level for that output stream.
static void emitEmptyTable(raw_ostream &o, uint32_t &i)
{
- o.indent(i * 2) << "static
InstrUID modRMEmptyTable[1] = { 0 };" << "
\n";
+ o.indent(i * 2) << "static
const InstrUID modRMEmptyTable[1] = { 0 };
\n";
o << "\n";
}
o << "\n";
}
@@
-454,7
+454,8
@@
void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
uint16_t index;
void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
uint16_t index;
- o.indent(i * 2) << "static InstructionContext " CONTEXTS_STR "[256] = {\n";
+ o.indent(i * 2) << "static const InstructionContext " CONTEXTS_STR
+ "[256] = {\n";
i++;
for (index = 0; index < 256; ++index) {
i++;
for (index = 0; index < 256; ++index) {