(W), PGP key ID and fingerprint (P), description (D), and snail-mail address
(S).
+N: Joe Abbey
+E: jabbey@arxan.com
+D: LLVM Bitcode (lib/Bitcode/* include/llvm/Bitcode/*)
+
N: Evan Cheng
E: evan.cheng@apple.com
-D: Code generator and all targets
+D: ARM target, parts of code generator not covered by someone else
+
+N: Eric Christopher
+E: echristo@gmail.com
+D: Debug Information, autotools, inline assembly
N: Greg Clayton
D: LLDB
N: Peter Collingbourne
D: libclc
+N: Hal Finkel
+E: hfinkel@anl.gov
+D: BBVectorize and the PowerPC target
+
N: Doug Gregor
D: Clang Frontend Libraries
N: Tobias Grosser
D: Polly
+N: James Grosbach
+E: grosbach@apple.com
+D: MC layer
+
N: Howard Hinnant
D: libc++
+N: Justin Holewinski
+E: jholewinski@nvidia.com
+D: NVPTX Target (lib/Target/NVPTX/*)
+
N: Anton Korobeynikov
-E: asl@math.spbu.ru
-D: Exception handling, debug information, and Windows codegen
+E: anton@korobeynikov.info
+D: Exception handling, Windows codegen, ARM EABI
+
+N: Benjamin Kramer
+E: benny.kra@gmail.com
+D: DWARF Parser
N: Ted Kremenek
D: Clang Static Analyzer
+N: Sergei Larin
+E: slarin@codeaurora.org
+D: VLIW Instruction Scheduling, Packetization
+
N: Chris Lattner
E: sabre@nondot.org
W: http://nondot.org/~sabre/
N: Jakob Olesen
D: Register allocators and TableGen
+N: Chad Rosier
+E: mcrosier@apple.com
+D: MS-inline asm, fast-isel
+
+N: Nadav Rotem
+E: nrotem@apple.com
+D: X86 Backend, Loop Vectorizer
+
N: Duncan Sands
E: baldrick@free.fr
D: DragonEgg
+
+N: Andrew Trick
+E: atrick@apple.com
+D: Instruction Scheduling