Adding an A15 specific optimization pass for interactions between S/D/Q registers...

[oota-llvm.git] / CODE_OWNERS.TXT

diff --git a/CODE_OWNERS.TXT b/CODE_OWNERS.TXT
index de944363a0100188a02f63bd0ca05c54a21a4f4a..f289ef6f697cb9e1e73bf8b7b5b6e119ee0bbb19 100644 (file)
--- a/CODE_OWNERS.TXT
+++ b/CODE_OWNERS.TXT
@@ -90,6 +90,10 @@ E: sabre@nondot.org
 W: http://nondot.org/~sabre/
 D: Everything not covered by someone else
 
+N: Tim Northover
+E: Tim.Northover@arm.com
+D: AArch64 backend
+
 N: Jakob Olesen
 D: Register allocators and TableGen
 
@@ -121,7 +125,3 @@ D: R600 Backend
 N: Andrew Trick
 E: atrick@apple.com
 D: IndVar Simplify, Loop Strength Reduction, Instruction Scheduling
-
-N: Bill Wendling
-E: wendling@apple.com
-D: libLTO & IR Linker