start defining codes for instructions

[oota-llvm.git] / CREDITS.TXT

diff --git a/CREDITS.TXT b/CREDITS.TXT
index daf611ff5f4084adc705c22a02bdf51699aff161..e516de2e12044470f683c415d3668ffd825e7534 100644 (file)
--- a/CREDITS.TXT
+++ b/CREDITS.TXT
@@ -49,7 +49,7 @@ D: Fixes to the Reassociation pass, various improvement patches
 
 N: Evan Cheng
 E: evan.cheng@apple.com
-D: X86 backend developer
+D: ARM and X86 backends
 D: Instruction scheduler improvements
 D: Loop optimizer improvements
 D: Target-independent code generator improvements
@@ -78,6 +78,11 @@ D: Portions of X86 static and JIT compilers; initial SparcV8 backend
 D: Dynamic trace optimizer 
 D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
 
+N: Nicolas Geoffray
+E: nicolas.geoffray@lip6.fr
+W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
+D: PPC backend fixes for Linux
+
 N: Louis Gerbarg
 D: Portions of the PowerPC backend
 
@@ -101,6 +106,10 @@ N: Brad Jones
 E: kungfoomaster@nondot.org
 D: Support for packed types
 
+N: Dale Johannesen
+E: dalej@apple.com
+D: ARM constant islands improvements
+
 N: Eric Kidd
 W: http://randomhacks.net/
 D: llvm-config script
@@ -113,6 +122,10 @@ N: Sumant Kowshik
 E: kowshik@uiuc.edu
 D: Author of the original C backend
 
+N: Christopher Lamb
+E: christopher.lamb@gmail.com
+D: aligned load/store support
+
 N: Jim Laskey
 E: jlaskey@apple.com
 D: Improvements to the PPC backend, instruction scheduling
@@ -159,11 +172,25 @@ N: Morten Ofstad
 E: morten@hue.no
 D: Visual C++ compatibility fixes 
 
+N: Devang Patel
+E: dpatel@apple.com
+D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
+D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
+D: Optimizer improvements
+
 N: Vladimir Prus
 W: http://vladimir_prus.blogspot.com
 E: ghost@cs.msu.su
 D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
 
+N: Roman Samoilov
+E: roman@codedgers.com
+D: MSIL backend
+
+N: Duncan Sands
+E: baldrick@free.fr
+D: Ada front-end
+
 N: Ruchira Sasanka
 E: sasanka@uiuc.edu
 D: Graph coloring register allocator for the Sparc64 backend