MALI: utgard: upgrade DDK to r7p0-00rel0

[firefly-linux-kernel-4.4.55.git] / Documentation / devicetree / bindings / arm / mali-utgard.txt

diff --git a/Documentation/devicetree/bindings/arm/mali-utgard.txt b/Documentation/devicetree/bindings/arm/mali-utgard.txt
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+/*\r
+ * Copyright (C) 2014, 2016 ARM Limited. All rights reserved.
+ * 
+ * This program is free software and is provided to you under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
+ * 
+ * A copy of the licence is included with the program, and can also be obtained from Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */\r
+* ARM Mali-300/400/450 GPU\r
+\r
+Required properties:\r
+- compatible:\r
+       At least one of these: "arm,mali-300", "arm,mali-400", "arm,mali-450"\r
+       Always: "arm,mali-utgard"\r
+       Mali-450 can also include "arm,mali-400" as it is compatible.\r
+       - "arm,mali-400", "arm,mali-utgard" for any Mali-400 GPU.\r
+       - "arm,mali-450", "arm,mali-400", "arm,mali-utgard" for any Mali-450 GPU.\r
+- reg:\r
+       Physical base address and length of the GPU's registers.\r
+- interrupts:\r
+       - List of all Mali interrupts.\r
+       - This list must match the number of and the order of entries in\r
+               interrupt-names.\r
+- interrupt-names:\r
+       - IRQPP<X> - Name for PP interrupts.\r
+       - IRQPPMMU<X> -  Name for interrupts from the PP MMU.\r
+       - IRQPP - Name for the PP broadcast interrupt (Mali-450 only).\r
+       - IRQGP - Name for the GP interrupt.\r
+       - IRQGPMMU - Name for the interrupt from the GP MMU.\r
+       - IRQPMU - Name for the PMU interrupt (If pmu is implemented in HW, it must be contained).\r
+\r
+Optional properties:\r
+- pmu_domain_config:\r
+       - If the Mali internal PMU is present and the PMU IRQ is specified in\r
+               interrupt/interrupt-names ("IRQPMU").This contains the mapping of\r
+               Mali HW units to the PMU power domain.\r
+       -Mali Dynamic power domain configuration in sequence from 0-11, like:\r
+               <GP PP0 PP1 PP2 PP3  PP4 PP5 PP6 PP7 L2$0 L2$1 L2$2>.\r
+- pmu-switch-delay:\r
+       - Only needed if the power gates are connected to the PMU in a high fanout\r
+               network. This value is the number of Mali clock cycles it takes to\r
+               enable the power gates and turn on the power mesh. This value will\r
+               have no effect if a daisy chain implementation is used.\r
+\r
+Platform related properties:\r
+- clocks: Phandle to clock for Mali utgard device.\r
+- clock-names: the corresponding names of clock in clocks property.\r
+- regulator: Phandle to regulator which is power supplier of mali device.\r
+\r
+Example for a Mali400_MP1_PMU device:\r
+\r
+/ {\r
+       ...\r
+\r
+       gpu@12300000 {\r
+               compatible = "arm,mali-400", "arm,mali-utgard";\r
+               reg = <0x12300000 0x30000>;\r
+               interrupts = <0 55 4>, <0 56 4>, <0 57 4>, <0 58 4>, <0 59 4>;\r
+               interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPMU";\r
+\r
+               pmu_domain_config = <0x1 0x4 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2 0x0 0x0>;\r
+               pmu_switch_delay = <0xff>;\r
+               clocks = <clock 122>, <clock 123>;\r
+               clock-names = "mali_parent", "mali";\r
+               vdd_g3d-supply = <regulator_Phandle>;\r
+       };\r
+}\r