Merge tag 'v3.17-rockchip-rk3288' of git://git.kernel.org/pub/scm/linux/kernel/git...

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / r8a7790.dtsi

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 994330e81a528256653a23957314c9ab4f08f80f..d9ddecbb859c122e022204d60f5dc350694fd5ff 100644 (file)
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -930,6 +930,66 @@
                status = "disabled";
        };
 
+       pci0: pci@ee090000 {
+               compatible = "renesas,pci-r8a7790";
+               device_type = "pci";
+               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               reg = <0 0xee090000 0 0xc00>,
+                     <0 0xee080000 0 0x1100>;
+               interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+
+               bus-range = <0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+               interrupt-map-mask = <0xff00 0 0 0x7>;
+               interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
+                                0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
+                                0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
+       pci1: pci@ee0b0000 {
+               compatible = "renesas,pci-r8a7790";
+               device_type = "pci";
+               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               reg = <0 0xee0b0000 0 0xc00>,
+                     <0 0xee0a0000 0 0x1100>;
+               interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+
+               bus-range = <1 1>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
+               interrupt-map-mask = <0xff00 0 0 0x7>;
+               interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
+                                0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
+                                0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
+       pci2: pci@ee0d0000 {
+               compatible = "renesas,pci-r8a7790";
+               device_type = "pci";
+               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               reg = <0 0xee0d0000 0 0xc00>,
+                     <0 0xee0c0000 0 0x1100>;
+               interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+
+               bus-range = <2 2>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+               interrupt-map-mask = <0xff00 0 0 0x7>;
+               interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
+                                0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
+                                0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
        pciec: pcie@fe000000 {
                compatible = "renesas,pcie-r8a7790";
                reg = <0 0xfe000000 0 0x80000>;
@@ -974,16 +1034,23 @@
                        <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
                        <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
                        <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
+                       <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
                        <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
                clock-names = "ssi-all",
                                "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
                                "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
                                "src.9", "src.8", "src.7", "src.6", "src.5",
                                "src.4", "src.3", "src.2", "src.1", "src.0",
+                               "dvc.0", "dvc.1",
                                "clk_a", "clk_b", "clk_c", "clk_i";
 
                status = "disabled";
 
+               rcar_sound,dvc {
+                       dvc0: dvc@0 { };
+                       dvc1: dvc@1 { };
+               };
+
                rcar_sound,src {
                        src0: src@0 { };
                        src1: src@1 { };