ARM: dts: rockchip: rk3288 add efuse_id for cpuinfo

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3288-android.dtsi

diff --git a/arch/arm/boot/dts/rk3288-android.dtsi b/arch/arm/boot/dts/rk3288-android.dtsi
index 84d732f898d639690782963756528b9f4791acac..c3f1239095c65662aaffee5704c49590c8a4e370 100644 (file)
--- a/arch/arm/boot/dts/rk3288-android.dtsi
+++ b/arch/arm/boot/dts/rk3288-android.dtsi
@@ -43,10 +43,17 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/rockchip-system-status.h>
 #include "rk3288-dram-default-timing.dtsi"
+#include <dt-bindings/display/media-bus-format.h>
 
 / {
        chosen {
-               bootargs = "earlycon=uart8250,mmio32,0xff690000";
+               bootargs = "earlycon=uart8250,mmio32,0xff690000 vmalloc=496M";
+       };
+
+       cpuinfo {
+               compatible = "rockchip,cpuinfo";
+               nvmem-cells = <&efuse_id>;
+               nvmem-cell-names = "id";
        };
 
        /delete-node/ dmc@ff610000;
@@ -84,8 +91,8 @@
                        SYS_STATUS_DUALVIEW     396000
                        SYS_STATUS_ISP          396000
                >;
-               auto-min-freq = <192000>;
-               auto-freq-en = <0>;
+               auto-min-freq = <396000>;
+               auto-freq-en = <1>;
                status = "diasbled";
        };
 
@@ -132,7 +139,7 @@
 
        fiq-debugger {
                compatible = "rockchip,fiq-debugger";
-               interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
                rockchip,serial-id = <2>;
                rockchip,wake-irq = <0>;
                rockchip,irq-mode-enable = <0>;  /* If enable uart uses irq instead of fiq */
@@ -206,13 +213,22 @@
                                connect = <&vopb_out_edp>;
                        };
 
-                       route_mipi: route-mipi {
+                       route_dsi0: route-dsi0 {
                                status = "disabled";
                                logo,uboot = "logo.bmp";
                                logo,kernel = "logo_kernel.bmp";
                                logo,mode = "center";
                                charge_logo,mode = "center";
-                               connect = <&vopb_out_mipi>;
+                               connect = <&vopb_out_dsi0>;
+                       };
+
+                       route_lvds: route-lvds {
+                               status = "disabled";
+                               logo,uboot = "logo.bmp";
+                               logo,kernel = "logo_kernel.bmp";
+                               logo,mode = "center";
+                               charge_logo,mode = "center";
+                               connect = <&vopb_out_lvds>;
                        };
                };
        };
@@ -325,6 +341,7 @@
                status = "disabled";
                compatible = "rockchip,rk3288-hdmi-analog",
                                "rockchip,rk3368-hdmi-analog";
+               rockchip,model = "rockchip,rt5640-codec";
                rockchip,cpu = <&i2s>;
                rockchip,codec = <&rt5640>, <&hdmi>;
                rockchip,widgets =
@@ -347,6 +364,18 @@
        enable-method = "psci";
 };
 
+&cpu0_opp_table {
+       clocks = <&cru PLL_APLL>;
+       leakage-scaling-sel = <0   254   25>;
+
+       opp-1800000000 {
+               opp-hz = /bits/ 64 <1800000000>;
+               opp-microvolt = <1350000>;
+               clock-latency-ns = <40000>;
+               status = "disabled";
+       };
+};
+
 &cpu1 {
        enable-method = "psci";
 };
@@ -376,6 +405,26 @@
        status = "okay";
 };
 
+&dsi0 {
+       ports {
+               dsi0_in: port {
+                       dsi0_in_vopl: endpoint@1 {
+                               status = "disabled";
+                       };
+               };
+       };
+};
+
+&edp {
+       ports {
+               edp_in: port@0 {
+                       edp_in_vopl: endpoint@1 {
+                               status = "disabled";
+                       };
+               };
+       };
+};
+
 &rga {
        compatible = "rockchip,rga2";
        clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;