*/
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/rockchip-system-status.h>
+#include "rk3288-dram-default-timing.dtsi"
+#include <dt-bindings/display/media-bus-format.h>
/ {
chosen {
- bootargs = "earlycon=uart8250,mmio32,0xff690000";
+ bootargs = "earlycon=uart8250,mmio32,0xff690000 vmalloc=496M";
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <&efuse_id>;
+ nvmem-cell-names = "id";
+ };
+
+ /delete-node/ dmc@ff610000;
+
+ dfi: dfi {
+ compatible = "rockchip,rk3288-dfi";
+ rockchip,pmu = <&pmu>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
+ dmc: dmc {
+ compatible = "rockchip,rk3288-dmc";
+ devfreq-events = <&dfi>;
+ clocks = <&cru SCLK_DDRCLK>, <&cru PCLK_PUBL0>,
+ <&cru PCLK_DDRUPCTL0>, <&cru PCLK_PUBL1>,
+ <&cru PCLK_DDRUPCTL1>;
+ clock-names = "dmc_clk", "pclk_phy0", "pclk_upctl0",
+ "pclk_phy1", "pclk_upctl1";
+ upthreshold = <55>;
+ downdifferential = <10>;
+ operating-points-v2 = <&dmc_opp_table>;
+ vop-dclk-mode = <0>;
+ min-cpu-freq = <600000>;
+ rockchip,ddr_timing = <&ddr_timing>;
+ system-status-freq = <
+ /*system status freq(KHz)*/
+ SYS_STATUS_NORMAL 396000
+ SYS_STATUS_REBOOT 396000
+ SYS_STATUS_SUSPEND 192000
+ SYS_STATUS_VIDEO_1080P 300000
+ SYS_STATUS_VIDEO_4K 396000
+ SYS_STATUS_PERFORMANCE 528000
+ SYS_STATUS_BOOST 396000
+ SYS_STATUS_DUALVIEW 396000
+ SYS_STATUS_ISP 396000
+ >;
+ auto-min-freq = <396000>;
+ auto-freq-en = <1>;
+ status = "diasbled";
+ };
+
+ dmc_opp_table: opp_table2 {
+ compatible = "operating-points-v2";
+
+ opp-192000000 {
+ opp-hz = /bits/ 64 <192000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp-396000000 {
+ opp-hz = /bits/ 64 <396000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp-528000000 {
+ opp-hz = /bits/ 64 <528000000>;
+ opp-microvolt = <1150000>;
+ };
+ };
+
+ reserved-memory {
+ ramoops_mem: ramoops@00000000 {
+ reg = <0x0 0x8000000 0x0 0xF0000>;
+ };
+
+ drm_logo: drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x0 0x0 0x0 0x0>;
+ };
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x0 0x20000>;
+ console-size = <0x0 0x80000>;
+ ftrace-size = <0x0 0x00000>;
+ pmsg-size = <0x0 0x50000>;
+ memory-region = <&ramoops_mem>;
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
+ rockchip,serial-id = <2>;
+ rockchip,wake-irq = <0>;
+ rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
+ rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_xfer>;
};
psci {
enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
- pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
+ pwms = <&pwm0 0 1000000 0>;
+ };
+
+ display-subsystem {
+ status = "okay";
+
+ ports = <&vopb_out>, <&vopl_out>;
+ memory-region = <&drm_logo>;
+
+ route {
+ route_edp: route-edp {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <&vopb_out_edp>;
+ };
+
+ route_dsi0: route-dsi0 {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <&vopb_out_dsi0>;
+ };
+
+ route_lvds: route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <&vopb_out_lvds>;
+ };
+ };
};
rk_key: rockchip-key {
dwc_control_usb: dwc-control-usb@ff770284 {
compatible = "rockchip,rk3288-dwc-control-usb";
status = "okay";
- reg = <0xff770284 0x04>, <0xff770288 0x04>,
- <0xff7702cc 0x04>, <0xff7702d4 0x04>,
- <0xff770320 0x14>, <0xff770334 0x14>,
- <0xff770348 0x10>, <0xff770358 0x08>,
- <0xff770360 0x08>;
+ reg = <0x0 0xff770284 0x0 0x04>, <0x0 0xff770288 0x0 0x04>,
+ <0x0 0xff7702cc 0x0 0x04>, <0x0 0xff7702d4 0x0 0x04>,
+ <0x0 0xff770320 0x0 0x14>, <0x0 0xff770334 0x0 0x14>,
+ <0x0 0xff770348 0x0 0x10>, <0x0 0xff770358 0x0 0x08>,
+ <0x0 0xff770360 0x0 0x08>;
reg-names = "GRF_SOC_STATUS1" ,"GRF_SOC_STATUS2",
"GRF_SOC_STATUS19", "GRF_SOC_STATUS21",
"GRF_UOC0_BASE", "GRF_UOC1_BASE",
rk_usb,fsvplus = <0x2cc 24 1>;
};
};
+
+ nandc0: nandc@ff400000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x0 0xff400000 0x0 0x4000>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ nandc_id = <0>;
+ clocks = <&cru SCLK_NANDC0>, <&cru HCLK_NANDC0>;
+ clock-names = "clk_nandc", "hclk_nandc";
+ status = "disabled";
+ };
+
+ hdmi_analog_sound: hdmi-analog-sound {
+ status = "disabled";
+ compatible = "rockchip,rk3288-hdmi-analog",
+ "rockchip,rk3368-hdmi-analog";
+ rockchip,model = "rockchip,rt5640-codec";
+ rockchip,cpu = <&i2s>;
+ rockchip,codec = <&rt5640>, <&hdmi>;
+ rockchip,widgets =
+ "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack";
+ rockchip,routing =
+ "MIC1", "Microphone Jack",
+ "MIC2", "Microphone Jack",
+ "Microphone Jack", "micbias1",
+ "Headphone Jack", "HPOL",
+ "Headphone Jack", "HPOR";
+ };
};
-&panel {
+&edp_panel {
backlight = <&backlight>;
};
enable-method = "psci";
};
+&cpu0_opp_table {
+ clocks = <&cru PLL_APLL>;
+ leakage-scaling-sel = <0 254 25>;
+
+ opp-1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1350000>;
+ clock-latency-ns = <40000>;
+ status = "disabled";
+ };
+};
+
&cpu1 {
enable-method = "psci";
};
&dmac_bus_s {
/* change to non-secure dmac */
- reg = <0xff600000 0x4000>;
+ reg = <0x0 0xff600000 0x0 0x4000>;
+};
+
+&efuse {
+ compatible = "rockchip,rk3288-secure-efuse";
+};
+
+&iep {
+ status = "okay";
+};
+
+&iep_mmu {
+ status = "okay";
+};
+
+&dsi0 {
+ ports {
+ dsi0_in: port {
+ dsi0_in_vopl: endpoint@1 {
+ status = "disabled";
+ };
+ };
+ };
+};
+
+&edp {
+ ports {
+ edp_in: port@0 {
+ edp_in_vopl: endpoint@1 {
+ status = "disabled";
+ };
+ };
+ };
};
&rga {
projects / firefly-linux-kernel-4.4.55.git / blobdiff