ARM: ux500: switch SSP/SPI clock name to "SSPCLK"

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / ste-dbx5x0.dtsi

diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 7da99fe497e13d59215b2bdd1b16a41fcd120c70..e41eedca3ce3c562a27fff268f09c43429cbc10f 100644 (file)
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -705,7 +705,7 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        clocks = <&prcc_kclk 3 1>, <&prcc_pclk 3 1>;
-                       clock-names = "ssp0clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */
                               <&dma 8 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
@@ -718,7 +718,7 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        clocks = <&prcc_kclk 3 2>, <&prcc_pclk 3 2>;
-                       clock-names = "ssp1clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */
                               <&dma 9 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
@@ -732,7 +732,7 @@
                        #size-cells = <0>;
                        /* Same clock wired to kernel and pclk */
                        clocks = <&prcc_pclk 2 8>, <&prcc_pclk 2 8>;
-                       clock-names = "spi0clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */
                               <&dma 0 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
@@ -746,7 +746,7 @@
                        #size-cells = <0>;
                        /* Same clock wired to kernel and pclk */
                        clocks = <&prcc_pclk 2 2>, <&prcc_pclk 2 2>;
-                       clock-names = "spi1clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */
                               <&dma 35 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
@@ -760,7 +760,7 @@
                        #size-cells = <0>;
                        /* Same clock wired to kernel and pclk */
                        clocks = <&prcc_pclk 2 1>, <&prcc_pclk 2 1>;
-                       clock-names = "spi2clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */
                               <&dma 33 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
@@ -774,7 +774,7 @@
                        #size-cells = <0>;
                        /* Same clock wired to kernel and pclk */
                        clocks = <&prcc_pclk 1 7>, <&prcc_pclk 1 7>;
-                       clock-names = "spi3clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */
                               <&dma 40 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
@@ -913,6 +913,10 @@
                        interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
                        v-ape-supply = <&db8500_vape_reg>;
 
+                       dmas = <&dma 31 0 0x12>, /* Logical - DevToMem - HighPrio */
+                              <&dma 31 0 0x10>; /* Logical - MemToDev - HighPrio */
+                       dma-names = "rx", "tx";
+
                        clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
                        clock-names = "msp", "apb_pclk";
 
@@ -925,6 +929,9 @@
                        interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
                        v-ape-supply = <&db8500_vape_reg>;
 
+                       dmas = <&dma 30 0 0x10>; /* Logical - MemToDev - HighPrio */
+                       dma-names = "tx";
+
                        clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
                        clock-names = "msp", "apb_pclk";
 
@@ -938,6 +945,11 @@
                        interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
                        v-ape-supply = <&db8500_vape_reg>;
 
+                       dmas = <&dma 14 0 0x12>, /* Logical  - DevToMem - HighPrio */
+                              <&dma 14 1 0x19>; /* Physical Chan 1 - MemToDev
+                                                    HighPrio - Fixed */
+                       dma-names = "rx", "tx";
+
                        clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
                        clock-names = "msp", "apb_pclk";
 
@@ -950,6 +962,9 @@
                        interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
                        v-ape-supply = <&db8500_vape_reg>;
 
+                       dmas = <&dma 30 0 0x12>; /* Logical - DevToMem - HighPrio */
+                       dma-names = "rx";
+
                        clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
                        clock-names = "msp", "apb_pclk";
 
@@ -987,6 +1002,23 @@
                        status = "disabled";
                };
 
+               mcde@a0350000 {
+                       compatible = "stericsson,mcde";
+                       reg = <0xa0350000 0x1000>, /* MCDE */
+                             <0xa0351000 0x1000>, /* DSI link 1 */
+                             <0xa0352000 0x1000>, /* DSI link 2 */
+                             <0xa0353000 0x1000>; /* DSI link 3 */
+                       interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
+                                <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
+                                <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */
+                                <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
+                                <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */
+                                <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
+                                <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */
+                                <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */
+               };
+
                cryp@a03cb000 {
                        compatible = "stericsson,ux500-cryp";
                        reg = <0xa03cb000 0x1000>;