Merge remote-tracking branch 'lsk/v3.10/topic/aosp' into linux-linaro-lsk-android

[firefly-linux-kernel-4.4.55.git] / arch / arm / kernel / perf_event_cpu.c

diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index 0b48a38e3cf47a5fdcd2f84e6041557c36f3e505..e0665b871f5b46a508dc98067d90a254955a78bf 100644 (file)
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -234,49 +234,39 @@ static struct platform_device_id cpu_pmu_plat_device_ids[] = {
 static int probe_current_pmu(struct arm_pmu *pmu)
 {
        int cpu = get_cpu();
-       unsigned long implementor = read_cpuid_implementor();
-       unsigned long part_number = read_cpuid_part_number();
        int ret = -ENODEV;
 
        pr_info("probing PMU on CPU %d\n", cpu);
 
+       switch (read_cpuid_part()) {
        /* ARM Ltd CPUs. */
-       if (implementor == ARM_CPU_IMP_ARM) {
-               switch (part_number) {
-               case ARM_CPU_PART_ARM1136:
-               case ARM_CPU_PART_ARM1156:
-               case ARM_CPU_PART_ARM1176:
-                       ret = armv6pmu_init(pmu);
-                       break;
-               case ARM_CPU_PART_ARM11MPCORE:
-                       ret = armv6mpcore_pmu_init(pmu);
-                       break;
-               case ARM_CPU_PART_CORTEX_A8:
-                       ret = armv7_a8_pmu_init(pmu);
-                       break;
-               case ARM_CPU_PART_CORTEX_A9:
-                       ret = armv7_a9_pmu_init(pmu);
-                       break;
-               case ARM_CPU_PART_CORTEX_A5:
-                       ret = armv7_a5_pmu_init(pmu);
-                       break;
-               case ARM_CPU_PART_CORTEX_A15:
-                       ret = armv7_a15_pmu_init(pmu);
-                       break;
-               case ARM_CPU_PART_CORTEX_A7:
-                       ret = armv7_a7_pmu_init(pmu);
-                       break;
-               }
-       /* Intel CPUs [xscale]. */
-       } else if (implementor == ARM_CPU_IMP_INTEL) {
-               switch (xscale_cpu_arch_version()) {
-               case ARM_CPU_XSCALE_ARCH_V1:
-                       ret = xscale1pmu_init(pmu);
-                       break;
-               case ARM_CPU_XSCALE_ARCH_V2:
-                       ret = xscale2pmu_init(pmu);
-                       break;
+       case ARM_CPU_PART_ARM1136:
+       case ARM_CPU_PART_ARM1156:
+       case ARM_CPU_PART_ARM1176:
+               ret = armv6pmu_init(pmu);
+               break;
+       case ARM_CPU_PART_ARM11MPCORE:
+               ret = armv6mpcore_pmu_init(pmu);
+               break;
+       case ARM_CPU_PART_CORTEX_A8:
+               ret = armv7_a8_pmu_init(pmu);
+               break;
+       case ARM_CPU_PART_CORTEX_A9:
+               ret = armv7_a9_pmu_init(pmu);
+               break;
+
+       default:
+               if (read_cpuid_implementor() == ARM_CPU_IMP_INTEL) {
+                       switch (xscale_cpu_arch_version()) {
+                       case ARM_CPU_XSCALE_ARCH_V1:
+                               ret = xscale1pmu_init(pmu);
+                               break;
+                       case ARM_CPU_XSCALE_ARCH_V2:
+                               ret = xscale2pmu_init(pmu);
+                               break;
+                       }
                }
+               break;
        }
 
        /* assume PMU support all the CPUs in this case */