Merge branch 'mvebu/fixes' into mvebu/soc-cpuidle

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-mvebu / pmsu.c

diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 9c819d65b337bb682db10a4844b44aff2b3bbd61..b31a8293a347c04a1974db7ba1644eb94498a309 100644 (file)
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -66,6 +66,8 @@ static void __iomem *pmsu_mp_base;
 extern void ll_disable_coherency(void);
 extern void ll_enable_coherency(void);
 
+extern void armada_370_xp_cpu_resume(void);
+
 static struct platform_device armada_xp_cpuidle_device = {
        .name = "cpuidle-armada-370-xp",
 };
@@ -140,13 +142,6 @@ static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
        writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
 }
 
-static void armada_370_xp_cpu_resume(void)
-{
-       asm volatile("bl    ll_add_cpu_to_smp_group\n\t"
-                    "bl    ll_enable_coherency\n\t"
-                    "b     cpu_resume\n\t");
-}
-
 /* No locking is needed because we only access per-CPU registers */
 int armada_370_xp_pmsu_idle_enter(unsigned long deepidle)
 {
@@ -201,12 +196,12 @@ int armada_370_xp_pmsu_idle_enter(unsigned long deepidle)
 
        /* Test the CR_C bit and set it if it was cleared */
        asm volatile(
-       "mrc    p15, 0, %0, c1, c0, 0 \n\t"
-       "tst    %0, #(1 << 2) \n\t"
-       "orreq  %0, %0, #(1 << 2) \n\t"
-       "mcreq  p15, 0, %0, c1, c0, 0 \n\t"
+       "mrc    p15, 0, r0, c1, c0, 0 \n\t"
+       "tst    r0, #(1 << 2) \n\t"
+       "orreq  r0, r0, #(1 << 2) \n\t"
+       "mcreq  p15, 0, r0, c1, c0, 0 \n\t"
        "isb    "
-       : : "r" (0));
+       : : : "r0");
 
        pr_warn("Failed to suspend the system\n");