i.MX25: add AUDMUX and SSI support

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-mx25 / clock.c

diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index 155014993b13cc18d7724ca5d3d03604c7a103e1..caeea75515821a77596c437178a2554ee2e89972 100644 (file)
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -109,6 +109,16 @@ static unsigned long get_rate_uart(struct clk *clk)
        return get_rate_per(15);
 }
 
+static unsigned long get_rate_ssi2(struct clk *clk)
+{
+       return get_rate_per(14);
+}
+
+static unsigned long get_rate_ssi1(struct clk *clk)
+{
+       return get_rate_per(13);
+}
+
 static unsigned long get_rate_i2c(struct clk *clk)
 {
        return get_rate_per(6);
@@ -131,7 +141,10 @@ static unsigned long get_rate_lcdc(struct clk *clk)
 
 static unsigned long get_rate_otg(struct clk *clk)
 {
-       return 48000000; /* FIXME */
+       unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
+       unsigned long rate = get_rate_upll();
+
+       return (cctl & (1 << 23)) ? 0 : rate / ((0x3F & (cctl >> 16)) + 1);
 }
 
 static int clk_cgcr_enable(struct clk *clk)
@@ -168,6 +181,8 @@ static void clk_cgcr_disable(struct clk *clk)
 
 DEFINE_CLOCK(gpt_clk,    0, CCM_CGCR0,  5, get_rate_gpt, NULL, NULL);
 DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);
+DEFINE_CLOCK(ssi1_per_clk, 0, CCM_CGCR0, 13, get_rate_ipg, NULL, NULL);
+DEFINE_CLOCK(ssi2_per_clk, 0, CCM_CGCR0, 14, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(cspi1_clk,  0, CCM_CGCR1,  5, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(cspi2_clk,  0, CCM_CGCR1,  6, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(cspi3_clk,  0, CCM_CGCR1,  7, get_rate_ipg, NULL, NULL);
@@ -191,6 +206,9 @@ DEFINE_CLOCK(i2c_clk,        0, CCM_CGCR0,  6, get_rate_i2c, NULL, NULL);
 DEFINE_CLOCK(fec_clk,   0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
 DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1,  8, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(lcdc_clk,  0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk);
+DEFINE_CLOCK(ssi1_clk,  0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk);
+DEFINE_CLOCK(ssi2_clk,  1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk);
+DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL);
 
 #define _REGISTER_CLOCK(d, n, c)       \
        {                               \
@@ -217,7 +235,7 @@ static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)
        _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)
        _REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)
-       _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
+       _REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)
        _REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)
        _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
        _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
@@ -225,6 +243,9 @@ static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK("fec.0", NULL, fec_clk)
        _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
        _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
+       _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
+       _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
+       _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
 };
 
 int __init mx25_clocks_init(void)