ARM: imx: Add core definitions for MX53

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-mx5 / crm_regs.h

diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
index c776b9af0624d35033bab0a87a0a339750cf7d92..51ff9bb0237943dc3eb13d083cbb482d7bbf2cb1 100644 (file)
--- a/arch/arm/mach-mx5/crm_regs.h
+++ b/arch/arm/mach-mx5/crm_regs.h
@@ -18,6 +18,9 @@
 #define MX51_CORTEXA8_BASE     MX51_IO_ADDRESS(MX51_ARM_BASE_ADDR)
 #define MX51_GPC_BASE          MX51_IO_ADDRESS(MX51_GPC_BASE_ADDR)
 
+/*MX53*/
+#define MX53_DPLL4_BASE                MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
+
 /* PLL Register Offsets */
 #define MXC_PLL_DP_CTL                 0x00
 #define MXC_PLL_DP_CONFIG              0x04
@@ -380,7 +383,8 @@
 /* Define the bits in register CLPCR */
 #define MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS                (0x1 << 23)
 #define MXC_CCM_CLPCR_BYPASS_SCC_LPM_HS                (0x1 << 22)
-#define MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS                (0x1 << 21)
+#define MX51_CCM_CLPCR_BYPASS_MAX_LPM_HS               (0x1 << 21)
+#define MX53_CCM_CLPCR_BYPASS_MAX_LPM_HS               (0x1 << 25)
 #define MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS       (0x1 << 20)
 #define MXC_CCM_CLPCR_BYPASS_EMI_LPM_HS                (0x1 << 19)
 #define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS                (0x1 << 18)