while (pclk && !pclk->dpll_data)
pclk = pclk->parent;
- /* clk does not have a DPLL as a parent? */
- WARN_ON(!pclk);
+ /* clk does not have a DPLL as a parent? error in the clock data */
+ if (!pclk) {
+ WARN_ON(1);
+ return 0;
+ }
dd = pclk->dpll_data;