ARM: OMAP3+: dpll: optimize noncore dpll locking logic

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-omap2 / dpll3xxx.c

diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index f0f10beeffe8ec77fe8d77b9a81934e83bd92bb1..c310dc0d40b4d357a72f3fd0c5ca2ce845cfce64 100644 (file)
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -135,11 +135,20 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n)
  */
 static int _omap3_noncore_dpll_lock(struct clk *clk)
 {
+       const struct dpll_data *dd;
        u8 ai;
-       int r;
+       u8 state = 1;
+       int r = 0;
 
        pr_debug("clock: locking DPLL %s\n", clk->name);
 
+       dd = clk->dpll_data;
+       state <<= __ffs(dd->idlest_mask);
+
+       /* Check if already locked */
+       if ((__raw_readl(dd->idlest_reg) & dd->idlest_mask) == state)
+               goto done;
+
        ai = omap3_dpll_autoidle_read(clk);
 
        if (ai)
@@ -152,6 +161,7 @@ static int _omap3_noncore_dpll_lock(struct clk *clk)
        if (ai)
                omap3_dpll_allow_idle(clk);
 
+done:
        return r;
 }