sram_printch('0');
flush_tlb_all();
+ #if defined(CONFIG_RK29_SPI_INSRAM) || defined(CONFIG_RK29_PWM_INSRAM)
interface_ctr_reg_pread();
+ #endif
+ #if defined(CONFIG_RK29_I2C_INSRAM)
+ i2c_interface_ctr_reg_pread();
+ #endif
/* disable clock */
clkgate[0] = cru_readl(CRU_CLKGATE0_CON);
| (1 << CLK_GATE_TPIU)
#endif
) | clkgate[0], CRU_CLKGATE0_CON);
+
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+#if defined(CONFIG_SND_RK29_SOC_I2S_8CH)
+ cru_writel(clkgate[0]&(~(1<<CLK_GATE_I2S0)),CRU_CLKGATE0_CON);
+#elif defined(CONFIG_SND_RK29_SOC_I2S_2CH)
+ cru_writel(clkgate[0]&(~(1<<CLK_GATE_I2S1)),CRU_CLKGATE0_CON);
+#endif
+#endif
+
cru_writel(~0, CRU_CLKGATE1_CON);
cru_writel(~((1 << CLK_GATE_GPIO1 % 32)
| (1 << CLK_GATE_GPIO2 % 32)
cru_writel(clksel0 & ~0x7FC000, CRU_CLKSEL0_CON);
sram_printch('4');
-
+ pm_gpio_suspend();
rk29_suspend();
-
+ pm_gpio_resume();
sram_printch('4');
/* resume general pll */