Merge tag 'remoteproc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ohad...

[firefly-linux-kernel-4.4.55.git] / arch / arm / mm / cache-l2x0.c

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 2864a7bcc24bdf737b4c837b58f98064a7355f44..71b3d3309024496570def04990751a634ef4ca02 100644 (file)
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -38,10 +38,11 @@ struct l2c_init_data {
        unsigned way_size_0;
        unsigned num_lock;
        void (*of_parse)(const struct device_node *, u32 *, u32 *);
-       void (*enable)(void __iomem *, u32, unsigned);
+       void (*enable)(void __iomem *, unsigned);
        void (*fixup)(void __iomem *, u32, struct outer_cache_fns *);
        void (*save)(void __iomem *);
        void (*configure)(void __iomem *);
+       void (*unlock)(void __iomem *, unsigned);
        struct outer_cache_fns outer_cache;
 };
 
@@ -117,18 +118,16 @@ static void l2c_configure(void __iomem *base)
  * Enable the L2 cache controller.  This function must only be
  * called when the cache controller is known to be disabled.
  */
-static void l2c_enable(void __iomem *base, u32 aux, unsigned num_lock)
+static void l2c_enable(void __iomem *base, unsigned num_lock)
 {
        unsigned long flags;
 
-       l2x0_saved_regs.aux_ctrl = aux;
-
        if (outer_cache.configure)
                outer_cache.configure(&l2x0_saved_regs);
        else
                l2x0_data->configure(base);
 
-       l2c_unlock(base, num_lock);
+       l2x0_data->unlock(base, num_lock);
 
        local_irq_save(flags);
        __l2c_op_way(base + L2X0_INV_WAY);
@@ -159,7 +158,7 @@ static void l2c_resume(void)
 
        /* Do not touch the controller if already enabled. */
        if (!(readl_relaxed(base + L2X0_CTRL) & L2X0_CTRL_EN))
-               l2c_enable(base, l2x0_saved_regs.aux_ctrl, l2x0_data->num_lock);
+               l2c_enable(base, l2x0_data->num_lock);
 }
 
 /*
@@ -249,6 +248,7 @@ static const struct l2c_init_data l2c210_data __initconst = {
        .enable = l2c_enable,
        .save = l2c_save,
        .configure = l2c_configure,
+       .unlock = l2c_unlock,
        .outer_cache = {
                .inv_range = l2c210_inv_range,
                .clean_range = l2c210_clean_range,
@@ -388,16 +388,22 @@ static void l2c220_sync(void)
        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
-static void l2c220_enable(void __iomem *base, u32 aux, unsigned num_lock)
+static void l2c220_enable(void __iomem *base, unsigned num_lock)
 {
        /*
         * Always enable non-secure access to the lockdown registers -
         * we write to them as part of the L2C enable sequence so they
         * need to be accessible.
         */
-       aux |= L220_AUX_CTRL_NS_LOCKDOWN;
+       l2x0_saved_regs.aux_ctrl |= L220_AUX_CTRL_NS_LOCKDOWN;
+
+       l2c_enable(base, num_lock);
+}
 
-       l2c_enable(base, aux, num_lock);
+static void l2c220_unlock(void __iomem *base, unsigned num_lock)
+{
+       if (readl_relaxed(base + L2X0_AUX_CTRL) & L220_AUX_CTRL_NS_LOCKDOWN)
+               l2c_unlock(base, num_lock);
 }
 
 static const struct l2c_init_data l2c220_data = {
@@ -407,6 +413,7 @@ static const struct l2c_init_data l2c220_data = {
        .enable = l2c220_enable,
        .save = l2c_save,
        .configure = l2c_configure,
+       .unlock = l2c220_unlock,
        .outer_cache = {
                .inv_range = l2c220_inv_range,
                .clean_range = l2c220_clean_range,
@@ -603,10 +610,11 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v
        return NOTIFY_OK;
 }
 
-static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
+static void __init l2c310_enable(void __iomem *base, unsigned num_lock)
 {
        unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK;
        bool cortex_a9 = read_cpuid_part() == ARM_CPU_PART_CORTEX_A9;
+       u32 aux = l2x0_saved_regs.aux_ctrl;
 
        if (rev >= L310_CACHE_ID_RTL_R2P0) {
                if (cortex_a9) {
@@ -649,9 +657,9 @@ static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
         * we write to them as part of the L2C enable sequence so they
         * need to be accessible.
         */
-       aux |= L310_AUX_CTRL_NS_LOCKDOWN;
+       l2x0_saved_regs.aux_ctrl = aux | L310_AUX_CTRL_NS_LOCKDOWN;
 
-       l2c_enable(base, aux, num_lock);
+       l2c_enable(base, num_lock);
 
        /* Read back resulting AUX_CTRL value as it could have been altered. */
        aux = readl_relaxed(base + L2X0_AUX_CTRL);
@@ -755,6 +763,12 @@ static void l2c310_resume(void)
                set_auxcr(get_auxcr() | BIT(3) | BIT(2) | BIT(1));
 }
 
+static void l2c310_unlock(void __iomem *base, unsigned num_lock)
+{
+       if (readl_relaxed(base + L2X0_AUX_CTRL) & L310_AUX_CTRL_NS_LOCKDOWN)
+               l2c_unlock(base, num_lock);
+}
+
 static const struct l2c_init_data l2c310_init_fns __initconst = {
        .type = "L2C-310",
        .way_size_0 = SZ_8K,
@@ -763,6 +777,7 @@ static const struct l2c_init_data l2c310_init_fns __initconst = {
        .fixup = l2c310_fixup,
        .save = l2c310_save,
        .configure = l2c310_configure,
+       .unlock = l2c310_unlock,
        .outer_cache = {
                .inv_range = l2c210_inv_range,
                .clean_range = l2c210_clean_range,
@@ -856,8 +871,11 @@ static int __init __l2c_init(const struct l2c_init_data *data,
         * Check if l2x0 controller is already enabled.  If we are booting
         * in non-secure mode accessing the below registers will fault.
         */
-       if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN))
-               data->enable(l2x0_base, aux, data->num_lock);
+       if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
+               l2x0_saved_regs.aux_ctrl = aux;
+
+               data->enable(l2x0_base, data->num_lock);
+       }
 
        outer_cache = fns;
 
@@ -1067,6 +1085,7 @@ static const struct l2c_init_data of_l2c210_data __initconst = {
        .enable = l2c_enable,
        .save = l2c_save,
        .configure = l2c_configure,
+       .unlock = l2c_unlock,
        .outer_cache = {
                .inv_range   = l2c210_inv_range,
                .clean_range = l2c210_clean_range,
@@ -1086,6 +1105,7 @@ static const struct l2c_init_data of_l2c220_data __initconst = {
        .enable = l2c220_enable,
        .save = l2c_save,
        .configure = l2c_configure,
+       .unlock = l2c220_unlock,
        .outer_cache = {
                .inv_range   = l2c220_inv_range,
                .clean_range = l2c220_clean_range,
@@ -1201,6 +1221,26 @@ static void __init l2c310_of_parse(const struct device_node *np,
                pr_err("L2C-310 OF arm,prefetch-offset property value is missing\n");
        }
 
+       ret = of_property_read_u32(np, "prefetch-data", &val);
+       if (ret == 0) {
+               if (val)
+                       prefetch |= L310_PREFETCH_CTRL_DATA_PREFETCH;
+               else
+                       prefetch &= ~L310_PREFETCH_CTRL_DATA_PREFETCH;
+       } else if (ret != -EINVAL) {
+               pr_err("L2C-310 OF prefetch-data property value is missing\n");
+       }
+
+       ret = of_property_read_u32(np, "prefetch-instr", &val);
+       if (ret == 0) {
+               if (val)
+                       prefetch |= L310_PREFETCH_CTRL_INSTR_PREFETCH;
+               else
+                       prefetch &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;
+       } else if (ret != -EINVAL) {
+               pr_err("L2C-310 OF prefetch-instr property value is missing\n");
+       }
+
        l2x0_saved_regs.prefetch_ctrl = prefetch;
 }
 
@@ -1213,6 +1253,7 @@ static const struct l2c_init_data of_l2c310_data __initconst = {
        .fixup = l2c310_fixup,
        .save  = l2c310_save,
        .configure = l2c310_configure,
+       .unlock = l2c310_unlock,
        .outer_cache = {
                .inv_range   = l2c210_inv_range,
                .clean_range = l2c210_clean_range,
@@ -1242,6 +1283,7 @@ static const struct l2c_init_data of_l2c310_coherent_data __initconst = {
        .fixup = l2c310_fixup,
        .save  = l2c310_save,
        .configure = l2c310_configure,
+       .unlock = l2c310_unlock,
        .outer_cache = {
                .inv_range   = l2c210_inv_range,
                .clean_range = l2c210_clean_range,
@@ -1368,7 +1410,7 @@ static void aurora_save(void __iomem *base)
  * For Aurora cache in no outer mode, enable via the CP15 coprocessor
  * broadcasting of cache commands to L2.
  */
-static void __init aurora_enable_no_outer(void __iomem *base, u32 aux,
+static void __init aurora_enable_no_outer(void __iomem *base,
        unsigned num_lock)
 {
        u32 u;
@@ -1379,7 +1421,7 @@ static void __init aurora_enable_no_outer(void __iomem *base, u32 aux,
 
        isb();
 
-       l2c_enable(base, aux, num_lock);
+       l2c_enable(base, num_lock);
 }
 
 static void __init aurora_fixup(void __iomem *base, u32 cache_id,
@@ -1419,6 +1461,7 @@ static const struct l2c_init_data of_aurora_with_outer_data __initconst = {
        .fixup = aurora_fixup,
        .save  = aurora_save,
        .configure = l2c_configure,
+       .unlock = l2c_unlock,
        .outer_cache = {
                .inv_range   = aurora_inv_range,
                .clean_range = aurora_clean_range,
@@ -1439,6 +1482,7 @@ static const struct l2c_init_data of_aurora_no_outer_data __initconst = {
        .fixup = aurora_fixup,
        .save  = aurora_save,
        .configure = l2c_configure,
+       .unlock = l2c_unlock,
        .outer_cache = {
                .resume      = l2c_resume,
        },
@@ -1589,6 +1633,7 @@ static const struct l2c_init_data of_bcm_l2x0_data __initconst = {
        .enable = l2c310_enable,
        .save  = l2c310_save,
        .configure = l2c310_configure,
+       .unlock = l2c310_unlock,
        .outer_cache = {
                .inv_range   = bcm_inv_range,
                .clean_range = bcm_clean_range,
@@ -1626,6 +1671,7 @@ static const struct l2c_init_data of_tauros3_data __initconst = {
        .enable = l2c_enable,
        .save  = tauros3_save,
        .configure = tauros3_configure,
+       .unlock = l2c_unlock,
        /* Tauros3 broadcasts L1 cache operations to L2 */
        .outer_cache = {
                .resume      = l2c_resume,