Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64...

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / Kconfig

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 676454a65af8ec7ded0b8cdebae1a69cc91bee97..b8d96f1554af11aef71af0627278925f244067a9 100644 (file)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1,7 +1,7 @@
 config ARM64
        def_bool y
-       select ARCH_BINFMT_ELF_RANDOMIZE_PIE
        select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
+       select ARCH_HAS_ELF_RANDOMIZE
        select ARCH_HAS_GCOV_PROFILE_ALL
        select ARCH_HAS_SG_CHAIN
        select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
@@ -143,17 +143,78 @@ config KERNEL_MODE_NEON
 config FIX_EARLYCON_MEM
        def_bool y
 
+config PGTABLE_LEVELS
+       int
+       default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
+       default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
+       default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
+       default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
 
 menu "Platform selection"
 
+config ARCH_EXYNOS
+       bool
+       help
+         This enables support for Samsung Exynos SoC family
+
+config ARCH_EXYNOS7
+       bool "ARMv8 based Samsung Exynos7"
+       select ARCH_EXYNOS
+       select COMMON_CLK_SAMSUNG
+       select HAVE_S3C2410_WATCHDOG if WATCHDOG
+       select HAVE_S3C_RTC if RTC_CLASS
+       select PINCTRL
+       select PINCTRL_EXYNOS
+
+       help
+         This enables support for Samsung Exynos7 SoC family
+
+config ARCH_FSL_LS2085A
+       bool "Freescale LS2085A SOC"
+       help
+         This enables support for Freescale LS2085A SOC.
+
+config ARCH_MEDIATEK
+       bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
+       select ARM_GIC
+       help
+         Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
+
 config ARCH_SEATTLE
        bool "AMD Seattle SoC Family"
        help
          This enables support for AMD Seattle SOC Family
 
+config ARCH_TEGRA
+       bool "NVIDIA Tegra SoC Family"
+       select ARCH_HAS_RESET_CONTROLLER
+       select ARCH_REQUIRE_GPIOLIB
+       select CLKDEV_LOOKUP
+       select CLKSRC_MMIO
+       select CLKSRC_OF
+       select GENERIC_CLOCKEVENTS
+       select HAVE_CLK
+       select PINCTRL
+       select RESET_CONTROLLER
+       help
+         This enables support for the NVIDIA Tegra SoC family.
+
+config ARCH_TEGRA_132_SOC
+       bool "NVIDIA Tegra132 SoC"
+       depends on ARCH_TEGRA
+       select PINCTRL_TEGRA124
+       select USB_ULPI if USB_PHY
+       select USB_ULPI_VIEWPORT if USB_PHY
+       help
+         Enable support for NVIDIA Tegra132 SoC, based on the Denver
+         ARMv8 CPU.  The Tegra132 SoC is similar to the Tegra124 SoC,
+         but contains an NVIDIA Denver CPU complex in place of
+         Tegra124's "4+1" Cortex-A15 CPU complex.
+
 config ARCH_THUNDER
        bool "Cavium Inc. Thunder SoC Family"
        help
@@ -307,6 +368,27 @@ config ARM64_ERRATUM_832075
 
          If unsure, say Y.
 
+config ARM64_ERRATUM_845719
+       bool "Cortex-A53: 845719: a load might read incorrect data"
+       depends on COMPAT
+       default y
+       help
+         This option adds an alternative code sequence to work around ARM
+         erratum 845719 on Cortex-A53 parts up to r0p4.
+
+         When running a compat (AArch32) userspace on an affected Cortex-A53
+         part, a load at EL0 from a virtual address that matches the bottom 32
+         bits of the virtual address used by a recent load at (AArch64) EL1
+         might return incorrect data.
+
+         The workaround is to write the contextidr_el1 register on exception
+         return to a 32-bit task.
+         Please note that this does not necessarily enable the workaround,
+         as it depends on the alternative framework, which will only patch
+         the kernel if an affected CPU is detected.
+
+         If unsure, say Y.
+
 endmenu
 
 
@@ -359,13 +441,6 @@ config ARM64_VA_BITS
        default 42 if ARM64_VA_BITS_42
        default 48 if ARM64_VA_BITS_48
 
-config ARM64_PGTABLE_LEVELS
-       int
-       default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
-       default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
-       default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
-       default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
-
 config CPU_BIG_ENDIAN
        bool "Build big-endian kernel"
        help
@@ -401,8 +476,8 @@ config SCHED_SMT
          places. If unsure say N here.
 
 config NR_CPUS
-       int "Maximum number of CPUs (2-64)"
-       range 2 64
+       int "Maximum number of CPUs (2-4096)"
+       range 2 4096
        depends on SMP
        # These have to remain sorted largest to smallest
        default "64"
@@ -416,6 +491,10 @@ config HOTPLUG_CPU
 
 source kernel/Kconfig.preempt
 
+config UP_LATE_INIT
+       def_bool y
+       depends on !SMP
+
 config HZ
        int
        default 100
@@ -616,7 +695,7 @@ source "fs/Kconfig.binfmt"
 
 config COMPAT
        bool "Kernel support for 32-bit EL0"
-       depends on !ARM64_64K_PAGES
+       depends on !ARM64_64K_PAGES || EXPERT
        select COMPAT_BINFMT_ELF
        select HAVE_UID16
        select OLD_SIGSUSPEND3
@@ -627,6 +706,10 @@ config COMPAT
          the user helper functions, VFP support and the ptrace interface are
          handled appropriately by the kernel.
 
+         If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
+         will only be able to execute AArch32 binaries that were compiled with
+         64k aligned segments.
+
          If you want to execute 32-bit userspace applications, say Y.
 
 config SYSVIPC_COMPAT