arm64: dts: rockchip: rk3368: export MIPI DPHY PLL clock

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3368.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 488e4450a7cbd99ebb6048523f6935ad024069db..167531b4cc6d48b398fd47fed0e8b88db6c04d86 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -1426,8 +1426,8 @@
                compatible = "rockchip,rk3368-mipi-dsi";
                reg = <0x0 0xff960000 0x0 0x4000>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru PCLK_MIPI_DSI0>;
-               clock-names = "pclk";
+               clocks = <&cru PCLK_MIPI_DSI0>, <&mipi_dphy>;
+               clock-names = "pclk", "hs_clk";
                resets = <&cru SRST_MIPIDSI0>;
                reset-names = "apb";
                phys = <&mipi_dphy>;
@@ -1450,11 +1450,13 @@
        mipi_dphy: mipi-dphy@ff968000 {
                compatible = "rockchip,rk3368-mipi-dphy";
                reg = <0x0 0xff968000 0x0 0x4000>;
-               #phy-cells = <0>;
                clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>;
                clock-names = "ref", "pclk";
+               clock-output-names = "mipi_dphy_pll";
+               #clock-cells = <0>;
                resets = <&cru SRST_MIPIDPHYTX>;
                reset-names = "apb";
+               #phy-cells = <0>;
                status = "disabled";
        };
 
@@ -1924,7 +1926,7 @@
 
                pwm3 {
                        pwm3_pin: pwm3-pin {
-                               rockchip,pins = <3 29 RK_FUNC_3 &pcfg_pull_none>;
+                               rockchip,pins = <3 30 RK_FUNC_3 &pcfg_pull_none>;
                        };
                };