#include <dt-bindings/display/rk_fb.h>
/ {
- fb: fb {
- compatible = "rockchip,rk-fb";
- rockchip,disp-mode = <DUAL>;
+ vpu: vpu_service@ff650000 {
+ compatible = "rockchip,vpu_service";
+ rockchip,grf = <&grf>;
+ iommu_enabled = <1>;
+ reg = <0x0 0xff650000 0x0 0x800>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_dec", "irq_enc";
+ clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+ clock-names = "aclk_vcodec", "hclk_vcodec";
+ resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>;
+ reset-names = "video_h", "video_a";
+ name = "vpu_service";
+ dev_mode = <0>;
status = "disabled";
};
- rk_screen: screen {
- compatible = "rockchip,screen";
+ vpu_mmu: vpu_mmu {
+ dbgname = "vpu";
+ compatible = "rockchip,vpu_mmu";
+ reg = <0x0 0xff650800 0x0 0x40>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vpu_mmu";
status = "disabled";
};
- vopl_rk_fb: vop-rk-fb@ff8f0000 {
- compatible = "rockchip,rk3399-lcdc";
- rockchip,prop = <EXTEND>;
- reg = <0x0 0xff8f0000 0x0 0x3efc>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
- clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
- resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
- reset-names = "axi", "ahb", "dclk";
+ rkvdec: rkvdec@ff660000 {
+ compatible = "rockchip,rkvdec";
rockchip,grf = <&grf>;
- rockchip,pwr18 = <0>;
- rockchip,iommu-enabled = <0>;
+ iommu_enabled = <1>;
+ reg = <0x0 0xff660000 0x0 0x400>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_dec";
+ clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,<&cru SCLK_VDU_CA>,<&cru SCLK_VDU_CORE>;
+ clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", "clk_core";
+ resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>;
+ reset-names = "video_h", "video_a";
+ dev_mode = <2>;
+ name = "rkvdec";
status = "disabled";
};
- vopl_mmu_rk_fb: vopl-mmu {
- dbgname = "vop";
- compatible = "rockchip,vopl_mmu";
- reg = <0x0 0xff8f3f00 0x0 0x100>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "vopl_mmu";
+ vdec_mmu: vdec_mmu {
+ dbgname = "vdec";
+ compatible = "rockchip,vdec_mmu";
+ reg = <0x0 0xff660480 0x0 0x40>,
+ <0x0 0xff6604c0 0x0 0x40>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vdec_mmu";
+ status = "disabled";
+ };
+
+ iep: iep@ff670000 {
+ compatible = "rockchip,iep";
+ iommu_enabled = <1>;
+ reg = <0x0 0xff670000 0x0 0x800>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "aclk_iep", "hclk_iep";
+ version = <2>;
+ status = "disabled";
+ };
+
+ iep_mmu: iep-mmu {
+ dbgname = "iep";
+ compatible = "rockchip,iep_mmu";
+ reg = <0x0 0xff670800 0x0 0x40>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "iep_mmu";
+ status = "disabled";
+ };
+
+ fb: fb {
+ compatible = "rockchip,rk-fb";
+ rockchip,disp-mode = <DUAL>;
+ status = "disabled";
+ };
+
+ rk_screen: screen {
+ compatible = "rockchip,screen";
status = "disabled";
};
reg = <0x0 0xff903f00 0x0 0x100>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopb_mmu";
+ status = "okay";
+ };
+
+ vopl_rk_fb: vop-rk-fb@ff8f0000 {
+ compatible = "rockchip,rk3399-lcdc";
+ rockchip,prop = <EXTEND>;
+ reg = <0x0 0xff8f0000 0x0 0x3efc>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
+ clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
+ resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
+ reset-names = "axi", "ahb", "dclk";
+ rockchip,grf = <&grf>;
+ rockchip,pwr18 = <0>;
+ rockchip,iommu-enabled = <0>;
status = "disabled";
};
+ vopl_mmu_rk_fb: vopl-mmu {
+ dbgname = "vop";
+ compatible = "rockchip,vopl_mmu";
+ reg = <0x0 0xff8f3f00 0x0 0x100>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vopl_mmu";
+ status = "okay";
+ };
+
hdmi_rk_fb: hdmi-rk-fb@ff940000 {
compatible = "rockchip,rk3399-hdmi";
reg = <0x0 0xff940000 0x0 0x20000>;