"Headphone Jack","HPOL",
"Headphone Jack","HPOR";
simple-audio-card,cpu {
- sound-dai = <&i2c1>;
+ sound-dai = <&i2s1>;
};
simple-audio-card,codec {
sound-dai = <&es8323>;
regulator-always-on;
};
+ vbus_5v: vbus-5v-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vbus_5v_drv>;
+ regulator-name = "vbus_5v";
+ };
+
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
};
leds {
- status = "disabled";
compatible = "gpio-leds";
power {
label = "firefly:blue:power";
pinctrl-0 = <&fusb0_int>;
int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
- status = "okay";
+ status = "disabled";
};
gsl3680: gsl3680@41 {
rockchip,playback-channels = <2>;
rockchip,capture-channels = <2>;
#sound-dai-cells = <0>;
+ assigned-clocks = <&cru SCLK_I2S1_DIV>, <&cru SCLK_I2S_8CH>;
+ assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S1_8CH>;
};
&i2s2 {
rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
+
+ vbus {
+ vbus_5v_drv: vbus-5v-drv {
+ rockchip,pins = <1 3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
};
&pwm0 {
};
&tcphy0 {
- extcon = <&fusb0>;
+ //extcon = <&fusb0>;
status = "okay";
};
&u2phy0 {
status = "okay";
- extcon = <&fusb0>;
+ //extcon = <&fusb0>;
u2phy0_otg: otg-port {
status = "okay";
status = "okay";
};
+&uart4 {
+ current-speed = <9600>;
+ no-loopback-test;
+ status = "okay";
+};
+
&usbdrd3_0 {
status = "okay";
- extcon = <&fusb0>;
+ //extcon = <&fusb0>;
};
&usbdrd3_1 {
&usbdrd_dwc3_0 {
status = "okay";
+ //dr_mode = "peripheral";
+ dr_mode = "host";
};
&usbdrd_dwc3_1 {