ARM64: firefly: Add rk3399-firefly board support

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 312840d480c8fc9567b284a4b7d6ff4e5cd8f9a1..3acdcc3fb4a4f4d39842711c1fc18644380c8714 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -227,6 +227,12 @@
                method = "smc";
        };
 
+       cpuinfo {
+               compatible = "rockchip,cpuinfo";
+               nvmem-cells = <&efuse_id>;
+               nvmem-cell-names = "id";
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
@@ -242,6 +248,20 @@
                #clock-cells = <0>;
        };
 
+       dummy_cpll: dummy_cpll {
+               compatible = "fixed-clock";
+               clock-frequency = <0>;
+               clock-output-names = "dummy_cpll";
+               #clock-cells = <0>;
+       };
+
+       dummy_vpll: dummy_vpll {
+               compatible = "fixed-clock";
+               clock-frequency = <0>;
+               clock-output-names = "dummy_vpll";
+               #clock-cells = <0>;
+       };
+
        amba {
                compatible = "arm,amba-bus";
                #address-cells = <2>;
@@ -1361,6 +1381,29 @@
                #iommu-cells = <0>;
        };
 
+       iep: iep@ff670000 {
+               compatible = "rockchip,iep";
+               iommu_enabled = <1>;
+               iommus = <&iep_mmu>;
+               reg = <0x0 0xff670000 0x0 0x800>;
+               interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+               clock-names = "aclk_iep", "hclk_iep";
+               power-domains = <&power RK3399_PD_IEP>;
+               allocator = <1>;
+               version = <2>;
+               status = "disabled";
+       };
+
+       iep_mmu: iommu@ff670800 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff670800 0x0 0x40>;
+               interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "iep_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        rga: rga@ff680000 {
                compatible = "rockchip,rk3399-rga";
                reg = <0x0 0xff680000 0x0 0x10000>;
@@ -1383,6 +1426,9 @@
                clock-names = "pclk_efuse";
 
                /* Data cells */
+               efuse_id: id {
+                       reg = <0x07 0x10>;
+               };
                cpul_leakage: cpul-leakage {
                        reg = <0x1a 0x1>;
                };