Blackfin: push gpio (port) defines into common headers

[firefly-linux-kernel-4.4.55.git] / arch / blackfin / mach-bf527 / include / mach / defBF52x_base.h

diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index 2e6f8aa4acb645a8583fd232cec6a3c25a101c05..a408100f4c30df0355ab50bbb5f9191a32781efd 100644 (file)
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -771,63 +771,6 @@
 #define EMU_RUN                        0x0200  /* Emulation Behavior Select                    */
 #define ERR_TYP                        0xC000  /* Error Type                                                   */
 
-
-/* ******************   GPIO PORTS F, G, H MASKS  ***********************/
-/*  General Purpose IO (0xFFC00700 - 0xFFC007FF)  Masks                                */
-/* Port F Masks                                                                                                                */
-#define PF0            0x0001
-#define PF1            0x0002
-#define PF2            0x0004
-#define PF3            0x0008
-#define PF4            0x0010
-#define PF5            0x0020
-#define PF6            0x0040
-#define PF7            0x0080
-#define PF8            0x0100
-#define PF9            0x0200
-#define PF10   0x0400
-#define PF11   0x0800
-#define PF12   0x1000
-#define PF13   0x2000
-#define PF14   0x4000
-#define PF15   0x8000
-
-/* Port G Masks                                                                                                                        */
-#define PG0            0x0001
-#define PG1            0x0002
-#define PG2            0x0004
-#define PG3            0x0008
-#define PG4            0x0010
-#define PG5            0x0020
-#define PG6            0x0040
-#define PG7            0x0080
-#define PG8            0x0100
-#define PG9            0x0200
-#define PG10   0x0400
-#define PG11   0x0800
-#define PG12   0x1000
-#define PG13   0x2000
-#define PG14   0x4000
-#define PG15   0x8000
-
-/* Port H Masks                                                                                                                        */
-#define PH0            0x0001
-#define PH1            0x0002
-#define PH2            0x0004
-#define PH3            0x0008
-#define PH4            0x0010
-#define PH5            0x0020
-#define PH6            0x0040
-#define PH7            0x0080
-#define PH8            0x0100
-#define PH9            0x0200
-#define PH10   0x0400
-#define PH11   0x0800
-#define PH12   0x1000
-#define PH13   0x2000
-#define PH14   0x4000
-#define PH15   0x8000
-
 /* *********************  ASYNCHRONOUS MEMORY CONTROLLER MASKS  *************************/
 /* EBIU_AMGCTL Masks                                                                                                                                   */
 #define AMCKEN                 0x0001          /* Enable CLKOUT                                                                        */