[MIPS] Enable support for the userlocal hardware register

[firefly-linux-kernel-4.4.55.git] / arch / mips / kernel / cpu-probe.c

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index ab755ea26c6a252587b936fe04b5f472b0354402..27fc1843423e8d9b5e6f2900a59c8cd815f37172 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -137,14 +137,24 @@ static inline void check_wait(void)
        case CPU_4KEC:
        case CPU_4KSC:
        case CPU_5KC:
-/*     case CPU_20KC:*/
-       case CPU_24K:
        case CPU_25KF:
+       case CPU_PR4450:
+               cpu_wait = r4k_wait;
+               break;
+
+       case CPU_24K:
        case CPU_34K:
+               cpu_wait = r4k_wait;
+               if (read_c0_config7() & MIPS_CONF7_WII)
+                       cpu_wait = r4k_wait_irqoff;
+               break;
+
        case CPU_74K:
-       case CPU_PR4450:
                cpu_wait = r4k_wait;
+               if ((c->processor_id & 0xff) >= PRID_REV_ENCODE_332(2, 1, 0))
+                       cpu_wait = r4k_wait_irqoff;
                break;
+
        case CPU_TX49XX:
                cpu_wait = r4k_wait_irqoff;
                break;
@@ -156,6 +166,17 @@ static inline void check_wait(void)
                if (allow_au1k_wait)
                        cpu_wait = au1k_wait;
                break;
+       case CPU_20KC:
+               /*
+                * WAIT on Rev1.0 has E1, E2, E3 and E16.
+                * WAIT on Rev2.0 and Rev3.0 has E16.
+                * Rev3.1 WAIT is nop, why bother
+                */
+               if ((c->processor_id & 0xff) <= 0x64)
+                       break;
+
+               cpu_wait = r4k_wait;
+               break;
        case CPU_RM9000:
                if ((c->processor_id & 0x00ff) >= 0x40)
                        cpu_wait = r4k_wait;
@@ -567,6 +588,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
                c->options |= MIPS_CPU_VEIC;
        if (config3 & MIPS_CONF3_MT)
                c->ases |= MIPS_ASE_MIPSMT;
+       if (config3 & MIPS_CONF3_ULRI)
+               c->options |= MIPS_CPU_ULRI;
 
        return config3 & MIPS_CONF_M;
 }