[MIPS] MIPS32/MIPS64 secondary cache management

[firefly-linux-kernel-4.4.55.git] / arch / mips / kernel / cpu-probe.c

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index bef3e2dc7c52674c120433257bfeb04b93e0ac42..e045aba4ebda2268f464eb382ca03dcd40bd24b5 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -597,8 +597,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
                break;
        case PRID_IMP_25KF:
                c->cputype = CPU_25KF;
-               /* Probe for L2 cache */
-               c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
                break;
        case PRID_IMP_34K:
                c->cputype = CPU_34K;
@@ -655,7 +653,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
        case PRID_IMP_SB1:
                c->cputype = CPU_SB1;
                /* FPU in pass1 is known to have issues. */
-               if ((c->processor_id & 0xff) < 0x20)
+               if ((c->processor_id & 0xff) < 0x02)
                        c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
                break;
        case PRID_IMP_SB1A: