MIPS: Malta: malta-time: Ensure GIC counter is running

[firefly-linux-kernel-4.4.55.git] / arch / mips / mti-malta / malta-time.c

diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index ce02dbdedc62c4d081bf8536563b50d896488529..185e68261f45937eae2b17dcd502420ce0121f69 100644 (file)
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -87,8 +87,10 @@ static void __init estimate_frequencies(void)
 
        /* Initialize counters. */
        start = read_c0_count();
-       if (gic_present)
+       if (gic_present) {
+               gic_start_count();
                gicstart = gic_read_count();
+       }
 
        /* Read counter exactly on falling edge of update flag. */
        while (CMOS_READ(RTC_REG_A) & RTC_UIP);
@@ -115,6 +117,22 @@ void read_persistent_clock(struct timespec *ts)
        ts->tv_nsec = 0;
 }
 
+int get_c0_fdc_int(void)
+{
+       int mips_cpu_fdc_irq;
+
+       if (cpu_has_veic)
+               mips_cpu_fdc_irq = -1;
+       else if (gic_present)
+               mips_cpu_fdc_irq = gic_get_c0_fdc_int();
+       else if (cp0_fdc_irq >= 0)
+               mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
+       else
+               mips_cpu_fdc_irq = -1;
+
+       return mips_cpu_fdc_irq;
+}
+
 int get_c0_perfcount_int(void)
 {
        if (cpu_has_veic) {