[MIPS] BCM1480: Fix PCI/HT IO access

[firefly-linux-kernel-4.4.55.git] / arch / mips / pci / pci-bcm1480ht.c

diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
index a3eebe5890a76db08e87fe305d6bc65dd76c1a6c..f54f45412b0baf9d1d9a5e0789b24f18ce28ee23 100644 (file)
--- a/arch/mips/pci/pci-bcm1480ht.c
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -31,7 +31,6 @@
  * problem.
  *
  */
-#include <linux/config.h>
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/kernel.h>
@@ -49,8 +48,8 @@
  * Macros for calculating offsets into config space given a device
  * structure or dev/fun/reg
  */
-#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where))
-#define CFGADDR(bus,devfn,where)   CFGOFFSET((bus)->number,(devfn),where)
+#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
+#define CFGADDR(bus, devfn, where)   CFGOFFSET((bus)->number, (devfn), where)
 
 static void *ht_cfg_space;
 
@@ -174,15 +173,15 @@ struct pci_ops bcm1480ht_pci_ops = {
 
 static struct resource bcm1480ht_mem_resource = {
        .name   = "BCM1480 HT MEM",
-       .start  = 0x40000000UL,
-       .end    = 0x5fffffffUL,
+       .start  = A_BCM1480_PHYS_HT_MEM_MATCH_BYTES,
+       .end    = A_BCM1480_PHYS_HT_MEM_MATCH_BYTES + 0x1fffffffUL,
        .flags  = IORESOURCE_MEM,
 };
 
 static struct resource bcm1480ht_io_resource = {
        .name   = "BCM1480 HT I/O",
-       .start  = 0x00000000UL,
-       .end    = 0x01ffffffUL,
+       .start  = A_BCM1480_PHYS_HT_IO_MATCH_BYTES,
+       .end    = A_BCM1480_PHYS_HT_IO_MATCH_BYTES + 0x01ffffffUL,
        .flags  = IORESOURCE_IO,
 };
 
@@ -192,29 +191,22 @@ struct pci_controller bcm1480ht_controller = {
        .io_resource    = &bcm1480ht_io_resource,
        .index          = 1,
        .get_busno      = bcm1480ht_pcibios_get_busno,
+       .io_offset      = A_BCM1480_PHYS_HT_IO_MATCH_BYTES,
 };
 
 static int __init bcm1480ht_pcibios_init(void)
 {
-       uint32_t cmdreg;
-
        ht_cfg_space = ioremap(A_BCM1480_PHYS_HT_CFG_MATCH_BITS, 16*1024*1024);
 
-       /*
-        * See if the PCI bus has been configured by the firmware.
-        */
-       cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0),
-                                    PCI_COMMAND));
-       if (!(cmdreg & PCI_COMMAND_MASTER)) {
-               printk("HT: Skipping HT probe. Bus is not initialized.\n");
-               iounmap(ht_cfg_space);
-               return 1; /* XXX */
-       }
+       /* CFE doesn't always init all HT paths, so we always scan */
        bcm1480ht_bus_status |= PCI_BUS_ENABLED;
 
        ht_eoi_space = (unsigned long)
                ioremap(A_BCM1480_PHYS_HT_SPECIAL_MATCH_BYTES,
                        4 * 1024 * 1024);
+       bcm1480ht_controller.io_map_base = (unsigned long)
+               ioremap(A_BCM1480_PHYS_HT_IO_MATCH_BYTES, 65536);
+       bcm1480ht_controller.io_map_base -= bcm1480ht_controller.io_offset;
 
        register_pci_controller(&bcm1480ht_controller);