[SPARC64]: Elminate all usage of hard-coded trap globals.

[firefly-linux-kernel-4.4.55.git] / arch / sparc64 / kernel / winfixup.S

diff --git a/arch/sparc64/kernel/winfixup.S b/arch/sparc64/kernel/winfixup.S
index f5d93aa99cbb1659e2adb7986410a4c0b0c0c81b..de588036df4300f965ef0a9cbc03bdad7d61cad3 100644 (file)
--- a/arch/sparc64/kernel/winfixup.S
+++ b/arch/sparc64/kernel/winfixup.S
@@ -39,6 +39,7 @@ set_pcontext:
         */
        .globl  fill_fixup, spill_fixup
 fill_fixup:
+       TRAP_LOAD_THREAD_REG
        rdpr            %tstate, %g1
        andcc           %g1, TSTATE_PRIV, %g0
        or              %g4, FAULT_CODE_WINFIXUP, %g4
@@ -84,11 +85,7 @@ fill_fixup:
        wrpr            %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
        mov             %o7, %g6
        ldx             [%g6 + TI_TASK], %g4
-#ifdef CONFIG_SMP
-#error IMMU TSB usage must be fixed
-       mov             TSB_REG, %g1
-       ldxa            [%g1] ASI_IMMU, %g5
-#endif
+       LOAD_PER_CPU_BASE(%g1, %g2)
 
        /* This is the same as below, except we handle this a bit special
         * since we must preserve %l5 and %l6, see comment above.
@@ -107,6 +104,7 @@ fill_fixup:
         * do not touch %g7 or %g2 so we handle the two cases fine.
         */
 spill_fixup:
+       TRAP_LOAD_THREAD_REG
        ldx             [%g6 + TI_FLAGS], %g1
        andcc           %g1, _TIF_32BIT, %g0
        ldub            [%g6 + TI_WSAVED], %g1
@@ -182,6 +180,7 @@ winfix_mna:
        wrpr            %g3, %tnpc
        done
 fill_fixup_mna:
+       TRAP_LOAD_THREAD_REG
        rdpr            %tstate, %g1
        andcc           %g1, TSTATE_PRIV, %g0
        be,pt           %xcc, window_mna_from_user_common
@@ -209,17 +208,14 @@ fill_fixup_mna:
        wrpr            %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
        mov             %o7, %g6                        ! Get current back.
        ldx             [%g6 + TI_TASK], %g4            ! Finish it.
-#ifdef CONFIG_SMP
-#error IMMU TSB usage must be fixed
-       mov             TSB_REG, %g1
-       ldxa            [%g1] ASI_IMMU, %g5
-#endif
+       LOAD_PER_CPU_BASE(%g1, %g2)
        call            mem_address_unaligned
         add            %sp, PTREGS_OFF, %o0
 
        b,pt            %xcc, rtrap
         nop                                            ! yes, the nop is correct
 spill_fixup_mna:
+       TRAP_LOAD_THREAD_REG
        ldx             [%g6 + TI_FLAGS], %g1
        andcc           %g1, _TIF_32BIT, %g0
        ldub            [%g6 + TI_WSAVED], %g1
@@ -287,6 +283,7 @@ winfix_dax:
        wrpr            %g3, %tnpc
        done
 fill_fixup_dax:
+       TRAP_LOAD_THREAD_REG
        rdpr            %tstate, %g1
        andcc           %g1, TSTATE_PRIV, %g0
        be,pt           %xcc, window_dax_from_user_common
@@ -314,17 +311,14 @@ fill_fixup_dax:
        wrpr            %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
        mov             %o7, %g6                        ! Get current back.
        ldx             [%g6 + TI_TASK], %g4            ! Finish it.
-#ifdef CONFIG_SMP
-#error IMMU TSB usage must be fixed
-       mov             TSB_REG, %g1
-       ldxa            [%g1] ASI_IMMU, %g5
-#endif
+       LOAD_PER_CPU_BASE(%g1, %g2)
        call            spitfire_data_access_exception
         add            %sp, PTREGS_OFF, %o0
 
        b,pt            %xcc, rtrap
         nop                                            ! yes, the nop is correct
 spill_fixup_dax:
+       TRAP_LOAD_THREAD_REG
        ldx             [%g6 + TI_FLAGS], %g1
        andcc           %g1, _TIF_32BIT, %g0
        ldub            [%g6 + TI_WSAVED], %g1