crypto: add CMAC support to CryptoAPI

[firefly-linux-kernel-4.4.55.git] / crypto / Kconfig

diff --git a/crypto/Kconfig b/crypto/Kconfig
index 0880a14834aa7c6d7a08a0a316557135d4c362e3..c1142f31a00c2dbf0133d8ab3a4162f59dca0e42 100644 (file)
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -198,6 +198,7 @@ config CRYPTO_GCM
        select CRYPTO_CTR
        select CRYPTO_AEAD
        select CRYPTO_GHASH
+       select CRYPTO_NULL
        help
          Support for Galois/Counter Mode (GCM) and Galois Message
          Authentication Code (GMAC). Required for IPSec.
@@ -282,6 +283,17 @@ config CRYPTO_XTS
 
 comment "Hash modes"
 
+config CRYPTO_CMAC
+       tristate "CMAC support"
+       select CRYPTO_HASH
+       select CRYPTO_MANAGER
+       help
+         Cipher-based Message Authentication Code (CMAC) specified by
+         The National Institute of Standards and Technology (NIST).
+
+         https://tools.ietf.org/html/rfc4493
+         http://csrc.nist.gov/publications/nistpubs/800-38B/SP_800-38B.pdf
+
 config CRYPTO_HMAC
        tristate "HMAC support"
        select CRYPTO_HASH
@@ -322,19 +334,9 @@ config CRYPTO_CRC32C
          by iSCSI for header and data digests and by others.
          See Castagnoli93.  Module will be crc32c.
 
-config CRYPTO_CRC32C_X86_64
-       bool
-       depends on X86 && 64BIT
-       select CRYPTO_HASH
-       help
-         In Intel processor with SSE4.2 supported, the processor will
-         support CRC32C calculation using hardware accelerated CRC32
-         instruction optimized with PCLMULQDQ instruction when available.
-
 config CRYPTO_CRC32C_INTEL
        tristate "CRC32c INTEL hardware acceleration"
        depends on X86
-       select CRYPTO_CRC32C_X86_64 if 64BIT
        select CRYPTO_HASH
        help
          In Intel processor with SSE4.2 supported, the processor will
@@ -353,6 +355,27 @@ config CRYPTO_CRC32C_SPARC64
          CRC32c CRC algorithm implemented using sparc64 crypto instructions,
          when available.
 
+config CRYPTO_CRC32
+       tristate "CRC32 CRC algorithm"
+       select CRYPTO_HASH
+       select CRC32
+       help
+         CRC-32-IEEE 802.3 cyclic redundancy-check algorithm.
+         Shash crypto api wrappers to crc32_le function.
+
+config CRYPTO_CRC32_PCLMUL
+       tristate "CRC32 PCLMULQDQ hardware acceleration"
+       depends on X86
+       select CRYPTO_HASH
+       select CRC32
+       help
+         From Intel Westmere and AMD Bulldozer processor with SSE4.2
+         and PCLMULQDQ supported, the processor will support
+         CRC32 PCLMULQDQ implementation using hardware accelerated PCLMULQDQ
+         instruction. This option will create 'crc32-plcmul' module,
+         which will enable any routine to use the CRC-32-IEEE 802.3 checksum
+         and gain better performance as compared with the table implementation.
+
 config CRYPTO_GHASH
        tristate "GHASH digest algorithm"
        select CRYPTO_GF128MUL
@@ -459,6 +482,28 @@ config CRYPTO_SHA1_SSSE3
          using Supplemental SSE3 (SSSE3) instructions or Advanced Vector
          Extensions (AVX), when available.
 
+config CRYPTO_SHA256_SSSE3
+       tristate "SHA256 digest algorithm (SSSE3/AVX/AVX2)"
+       depends on X86 && 64BIT
+       select CRYPTO_SHA256
+       select CRYPTO_HASH
+       help
+         SHA-256 secure hash standard (DFIPS 180-2) implemented
+         using Supplemental SSE3 (SSSE3) instructions, or Advanced Vector
+         Extensions version 1 (AVX1), or Advanced Vector Extensions
+         version 2 (AVX2) instructions, when available.
+
+config CRYPTO_SHA512_SSSE3
+       tristate "SHA512 digest algorithm (SSSE3/AVX/AVX2)"
+       depends on X86 && 64BIT
+       select CRYPTO_SHA512
+       select CRYPTO_HASH
+       help
+         SHA-512 secure hash standard (DFIPS 180-2) implemented
+         using Supplemental SSE3 (SSSE3) instructions, or Advanced Vector
+         Extensions version 1 (AVX1), or Advanced Vector Extensions
+         version 2 (AVX2) instructions, when available.
+
 config CRYPTO_SHA1_SPARC64
        tristate "SHA1 digest algorithm (SPARC64)"
        depends on SPARC64