<div class="doc_text">
<p>
- TODO
+ <p>The <tt>TargetSubtarget</tt> class is used to provide information about the
+ specific chip set being targeted. A sub-target informs code generation of
+ which instructions are supported, instruction latencies and instruction
+ execution itinerary; i.e., which processing units are used, in what order, and
+ for how long.
</p>
</div>
(fadd:f32 (fmul:f32 (fadd:f32 W, X), Y), Z)
</pre>
-<p>If a target supports floating pointer multiply-and-add (FMA) operations, one
+<p>If a target supports floating point multiply-and-add (FMA) operations, one
of the adds can be merged with the multiply. On the PowerPC, for example, the
output of the instruction selector might look like this DAG:</p>
Selection DAG is destroyed.
</p>
-<p>Note that this phase is logically seperate from the instruction selection
+<p>Note that this phase is logically separate from the instruction selection
phase, but is tied to it closely in the code because it operates on
SelectionDAGs.</p>