A backwards compatible bc format for packed structs

[oota-llvm.git] / docs / CodeGenerator.html

diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index f095e36312d4d8e54d1354a27c8485af05397c78..42721b6a35f941f8bd51850c14a86cfbc394bcff 100644 (file)
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -1227,7 +1227,18 @@ defining instruction is encountered.</p>
 </div>
 
 <div class="doc_text">
-<p>To Be Written</p>
+
+<p>We now have the information available to perform the live intervals analysis
+and build the live intervals themselves.  We start off by numbering the basic
+blocks and machine instructions.  We then handle the "live-in" values.  These
+are in physical registers, so the physical register is assumed to be killed by
+the end of the basic block.  Live intervals for virtual registers are computed
+for some ordering of the machine instructions <tt>[1, N]</tt>.  A live interval
+is an interval <tt>[i, j)</tt>, where <tt>1 <= i <= j < N</tt>, for which a
+variable is live.</p>
+
+<p><i><b>More to come...</b></i></p>
+
 </ol>
 
 </div>
@@ -1239,14 +1250,14 @@ defining instruction is encountered.</p>
 
 <div class="doc_text">
 
-<p>The <i>Register Allocation problem</i> consists in mapping a
-program <i>P<sub>v</sub></i>, that can use an unbounded number of
-virtual registers, to a program <i>P<sub>p</sub></i> that contains a
-finite (possibly small) number of physical registers. Each target
-architecture has a different number of physical registers. If the
-number of physical registers is not enough to accommodate all the
-virtual registers, some of them will have to be mapped into
-memory. These virtuals are called <i>spilled virtuals</i>.</p>
+<p>The <i>Register Allocation problem</i> consists in mapping a program
+<i>P<sub>v</sub></i>, that can use an unbounded number of virtual
+registers, to a program <i>P<sub>p</sub></i> that contains a finite
+(possibly small) number of physical registers. Each target architecture has
+a different number of physical registers. If the number of physical
+registers is not enough to accommodate all the virtual registers, some of
+them will have to be mapped into memory. These virtuals are called
+<i>spilled virtuals</i>.</p>
 
 </div>
 
@@ -1636,11 +1647,31 @@ that people test.</p>
 <li><b>i386-unknown-freebsd5.3</b> - FreeBSD 5.3</li>
 <li><b>i686-pc-cygwin</b> - Cygwin on Win32</li>
 <li><b>i686-pc-mingw32</b> - MingW on Win32</li>
+<li><b>i386-pc-mingw32msvc</b> - MingW crosscompiler on Linux</li>
 <li><b>i686-apple-darwin*</b> - Apple Darwin on X86</li>
 </ul>
 
 </div>
 
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="x86_cc">X86 Calling Conventions supported</a>
+</div>
+
+
+<div class="doc_text">
+
+<p>The folowing target-specific calling conventions are known to backend:</p>
+
+<ul>
+<li><b>x86_StdCall</b> - stdcall calling convention seen on Microsoft Windows
+platform (CC ID = 64).</li>
+<li><b>x86_FastCall</b> - fastcall calling convention seen on Microsoft Windows
+platform (CC ID = 65).</li>
+</ul>
+
+</div>
+
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
   <a name="x86_memory">Representing X86 addressing modes in MachineInstrs</a>