<li><a href="#callingconv">Calling Conventions</a></li>
<li><a href="#globalvars">Global Variables</a></li>
<li><a href="#functionstructure">Functions</a></li>
+ <li><a href="aliasstructure">Aliases</a>
<li><a href="#paramattrs">Parameter Attributes</a></li>
<li><a href="#moduleasm">Module-Level Inline Assembly</a></li>
<li><a href="#datalayout">Data Layout</a></li>
<ol>
<li><a href="#int_varargs">Variable Argument Handling Intrinsics</a>
<ol>
- <li><a href="#i_va_start">'<tt>llvm.va_start</tt>' Intrinsic</a></li>
- <li><a href="#i_va_end">'<tt>llvm.va_end</tt>' Intrinsic</a></li>
- <li><a href="#i_va_copy">'<tt>llvm.va_copy</tt>' Intrinsic</a></li>
+ <li><a href="#int_va_start">'<tt>llvm.va_start</tt>' Intrinsic</a></li>
+ <li><a href="#int_va_end">'<tt>llvm.va_end</tt>' Intrinsic</a></li>
+ <li><a href="#int_va_copy">'<tt>llvm.va_copy</tt>' Intrinsic</a></li>
</ol>
</li>
<li><a href="#int_gc">Accurate Garbage Collection Intrinsics</a>
<ol>
- <li><a href="#i_gcroot">'<tt>llvm.gcroot</tt>' Intrinsic</a></li>
- <li><a href="#i_gcread">'<tt>llvm.gcread</tt>' Intrinsic</a></li>
- <li><a href="#i_gcwrite">'<tt>llvm.gcwrite</tt>' Intrinsic</a></li>
+ <li><a href="#int_gcroot">'<tt>llvm.gcroot</tt>' Intrinsic</a></li>
+ <li><a href="#int_gcread">'<tt>llvm.gcread</tt>' Intrinsic</a></li>
+ <li><a href="#int_gcwrite">'<tt>llvm.gcwrite</tt>' Intrinsic</a></li>
</ol>
</li>
<li><a href="#int_codegen">Code Generator Intrinsics</a>
<ol>
- <li><a href="#i_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a></li>
- <li><a href="#i_frameaddress">'<tt>llvm.frameaddress</tt>' Intrinsic</a></li>
- <li><a href="#i_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a></li>
- <li><a href="#i_stackrestore">'<tt>llvm.stackrestore</tt>' Intrinsic</a></li>
- <li><a href="#i_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a></li>
- <li><a href="#i_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a></li>
- <li><a href="#i_readcyclecounter"><tt>llvm.readcyclecounter</tt>' Intrinsic</a></li>
+ <li><a href="#int_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a></li>
+ <li><a href="#int_frameaddress">'<tt>llvm.frameaddress</tt>' Intrinsic</a></li>
+ <li><a href="#int_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a></li>
+ <li><a href="#int_stackrestore">'<tt>llvm.stackrestore</tt>' Intrinsic</a></li>
+ <li><a href="#int_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a></li>
+ <li><a href="#int_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a></li>
+ <li><a href="#int_readcyclecounter"><tt>llvm.readcyclecounter</tt>' Intrinsic</a></li>
</ol>
</li>
<li><a href="#int_libc">Standard C Library Intrinsics</a>
<ol>
- <li><a href="#i_memcpy">'<tt>llvm.memcpy.*</tt>' Intrinsic</a></li>
- <li><a href="#i_memmove">'<tt>llvm.memmove.*</tt>' Intrinsic</a></li>
- <li><a href="#i_memset">'<tt>llvm.memset.*</tt>' Intrinsic</a></li>
- <li><a href="#i_sqrt">'<tt>llvm.sqrt.*</tt>' Intrinsic</a></li>
- <li><a href="#i_powi">'<tt>llvm.powi.*</tt>' Intrinsic</a></li>
+ <li><a href="#int_memcpy">'<tt>llvm.memcpy.*</tt>' Intrinsic</a></li>
+ <li><a href="#int_memmove">'<tt>llvm.memmove.*</tt>' Intrinsic</a></li>
+ <li><a href="#int_memset">'<tt>llvm.memset.*</tt>' Intrinsic</a></li>
+ <li><a href="#int_sqrt">'<tt>llvm.sqrt.*</tt>' Intrinsic</a></li>
+ <li><a href="#int_powi">'<tt>llvm.powi.*</tt>' Intrinsic</a></li>
</ol>
</li>
<li><a href="#int_manip">Bit Manipulation Intrinsics</a>
<ol>
- <li><a href="#i_bswap">'<tt>llvm.bswap.*</tt>' Intrinsics</a></li>
+ <li><a href="#int_bswap">'<tt>llvm.bswap.*</tt>' Intrinsics</a></li>
<li><a href="#int_ctpop">'<tt>llvm.ctpop.*</tt>' Intrinsic </a></li>
<li><a href="#int_ctlz">'<tt>llvm.ctlz.*</tt>' Intrinsic </a></li>
<li><a href="#int_cttz">'<tt>llvm.cttz.*</tt>' Intrinsic </a></li>
+ <li><a href="#int_part_select">'<tt>llvm.part.select.*</tt>' Intrinsic </a></li>
+ <li><a href="#int_part_set">'<tt>llvm.part.set.*</tt>' Intrinsic </a></li>
</ol>
</li>
<li><a href="#int_debugger">Debugger intrinsics</a></li>
until linked, if not linked, the symbol becomes null instead of being an
undefined reference.
</dd>
-</dl>
<dt><tt><b><a name="linkage_external">externally visible</a></b></tt>:</dt>
visible, meaning that it participates in linkage and can be used to resolve
external symbol references.
</dd>
+</dl>
<p>
The next two types of linkage are targeted for Microsoft Windows platform
<p>It is illegal for a function <i>declaration</i>
to have any linkage type other than "externally visible", <tt>dllimport</tt>,
or <tt>extern_weak</tt>.</p>
-
+<p>Aliases can have only <tt>external</tt>, <tt>internal</tt> and <tt>weak</tt>
+linkages.
</div>
<!-- ======================================================================= -->
<p>Global variables define regions of memory allocated at compilation time
instead of run-time. Global variables may optionally be initialized, may have
-an explicit section to be placed in, and may
-have an optional explicit alignment specified. A
-variable may be defined as a global "constant," which indicates that the
-contents of the variable will <b>never</b> be modified (enabling better
+an explicit section to be placed in, and may have an optional explicit alignment
+specified. A variable may be defined as "thread_local", which means that it
+will not be shared by threads (each thread will have a separated copy of the
+variable). A variable may be defined as a global "constant," which indicates
+that the contents of the variable will <b>never</b> be modified (enabling better
optimization, allowing the global data to be placed in the read-only section of
an executable, etc). Note that variables that need runtime initialization
cannot be marked "constant" as there is a store to the variable.</p>
</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+ <a name="aliasstructure">Aliases</a>
+</div>
+<div class="doc_text">
+ <p>Aliases act as "second name" for the aliasee value (which can be either
+ function or global variable or bitcast of global value). Aliases may have an
+ optional <a href="#linkage">linkage type</a>, and an
+ optional <a href="#visibility">visibility style</a>.</p>
+
+ <h5>Syntax:</h5>
+
+ <pre>
+ @<Name> = [Linkage] [Visibility] alias <AliaseeTy> @<Aliasee>
+ </pre>
+
+</div>
+
+
+
<!-- ======================================================================= -->
<div class="doc_subsection"><a name="paramattrs">Parameter Attributes</a></div>
<div class="doc_text">
<div class="doc_text">
<p>A module may specify a target specific data layout string that specifies how
-data is to be laid out in memory. The syntax for the data layout is simply:<br/>
-<pre> target datalayout = "<i>layout specification</i>"
-</pre>
-The <i>layout specification</i> consists of a list of specifications separated
-by the minus sign character ('-'). Each specification starts with a letter
-and may include other information after the letter to define some aspect of the
-data layout. The specifications accepted are as follows: </p>
+data is to be laid out in memory. The syntax for the data layout is simply:</p>
+<pre> target datalayout = "<i>layout specification</i>"</pre>
+<p>The <i>layout specification</i> consists of a list of specifications
+separated by the minus sign character ('-'). Each specification starts with a
+letter and may include other information after the letter to define some
+aspect of the data layout. The specifications accepted are as follows: </p>
<dl>
<dt><tt>E</tt></dt>
<dd>Specifies that the target lays out data in big-endian form. That is, the
<h5>Examples:</h5>
<table class="layout">
<tr class="layout">
- <td class="left">
- <tt>{ i32, i32, i32 }</tt><br/>
- <tt>{ float, i32 (i32) * }</tt><br/>
- </td>
- <td class="left">
- a triple of three <tt>i32</tt> values<br/>
- A pair, where the first element is a <tt>float</tt> and the second element
- is a <a href="#t_pointer">pointer</a> to a <a href="#t_function">function</a>
- that takes an <tt>i32</tt>, returning an <tt>i32</tt>.<br/>
- </td>
+ <td class="left"><tt>{ i32, i32, i32 }</tt></td>
+ <td class="left">A triple of three <tt>i32</tt> values</td>
+ </tr><tr class="layout">
+ <td class="left"><tt>{ float, i32 (i32) * }</tt></td>
+ <td class="left">A pair, where the first element is a <tt>float</tt> and the
+ second element is a <a href="#t_pointer">pointer</a> to a
+ <a href="#t_function">function</a> that takes an <tt>i32</tt>, returning
+ an <tt>i32</tt>.</td>
</tr>
</table>
</div>
<h5>Examples:</h5>
<table class="layout">
<tr class="layout">
- <td class="left">
- <tt> < { i32, i32, i32 } > </tt><br/>
- <tt> < { float, i32 (i32) * } > </tt><br/>
- </td>
- <td class="left">
- a triple of three <tt>i32</tt> values<br/>
- A pair, where the first element is a <tt>float</tt> and the second element
- is a <a href="#t_pointer">pointer</a> to a <a href="#t_function">function</a>
- that takes an <tt>i32</tt>, returning an <tt>i32</tt>.<br/>
- </td>
+ <td class="left"><tt>< { i32, i32, i32 } ></tt></td>
+ <td class="left">A triple of three <tt>i32</tt> values</td>
+ </tr><tr class="layout">
+ <td class="left"><tt>< { float, i32 (i32) * } ></tt></td>
+ <td class="left">A pair, where the first element is a <tt>float</tt> and the
+ second element is a <a href="#t_pointer">pointer</a> to a
+ <a href="#t_function">function</a> that takes an <tt>i32</tt>, returning
+ an <tt>i32</tt>.</td>
</tr>
</table>
</div>
<dd>Vector constants are represented with notation similar to vector type
definitions (a comma separated list of elements, surrounded by
less-than/greater-than's (<tt><></tt>)). For example: "<tt>< i32 42,
- i32 11, i32 74, i32 100 ></tt>". V
Ector constants must have <a
+ i32 11, i32 74, i32 100 ></tt>". V
ector constants must have <a
href="#t_vector">vector type</a>, and the number and types of elements must
match those specified by the type.
</dd>
</p>
<pre>
- %X = call i32 asm "<a href="#i_bswap">bswap</a> $0", "=r,r"(i32 %Y)
+ %X = call i32 asm "<a href="#int_bswap">bswap</a> $0", "=r,r"(i32 %Y)
</pre>
<p>
<h5>Example:</h5>
<pre>
- %retval = invoke i32 %Test(i32 15) to label %Continue
- unwind label %TestCleanup <i>; {i32}:retval set</i>
- %retval = invoke <a href="#callingconv">coldcc</a> i32 %Test(i32 15) to label %Continue
- unwind label %TestCleanup <i>; {i32}:retval set</i>
+ %retval = invoke i32 %Test(i32 15) to label %Continue
+ unwind label %TestCleanup <i>; {i32}:retval set</i>
+ %retval = invoke <a href="#callingconv">coldcc</a> i32 %Test(i32 15) to label %Continue
+ unwind label %TestCleanup <i>; {i32}:retval set</i>
</pre>
</div>
<p>The '<tt>fdiv</tt>' instruction returns the quotient of its two
operands.</p>
<h5>Arguments:</h5>
-<p>The two arguments to the '<tt>div</tt>' instruction must be
+<p>The two arguments to the '<tt>fdiv</tt>' instruction must be
<a href="#t_floating">floating point</a> values. Both arguments must have
identical types. This instruction can also take <a href="#t_vector">vector</a>
-versions of the values in which case the elements must be floating point.</p>
+versions of floating point values.</p>
<h5>Semantics:</h5>
<p>The value produced is the floating point quotient of the two operands.</p>
<h5>Example:</h5>
<h5>Overview:</h5>
<p>The '<tt>lshr</tt>' instruction (logical shift right) returns the first
-operand shifted to the right a specified number of bits.</p>
+operand shifted to the right a specified number of bits with zero fill.</p>
<h5>Arguments:</h5>
<p>Both arguments to the '<tt>lshr</tt>' instruction must be the same
<h5>Overview:</h5>
<p>The '<tt>ashr</tt>' instruction (arithmetic shift right) returns the first
-operand shifted to the right a specified number of bits.</p>
+operand shifted to the right a specified number of bits with sign extension.</p>
<h5>Arguments:</h5>
<p>Both arguments to the '<tt>ashr</tt>' instruction must be the same
<div class="doc_text">
<p>LLVM supports several instructions to represent vector operations in a
-target-independent manner. This instructions cover the element-access and
+target-independent manner. These instructions cover the element-access and
vector-specific operations needed to process vectors effectively. While LLVM
does directly support these vector operations, many sophisticated algorithms
will want to use target-specific intrinsics to take full advantage of a specific
<pre>
%result = shufflevector <4 x i32> %v1, <4 x i32> %v2,
- <4 x i32> <i32 0, i32 4, i32 1, i32 5> <i>; yields <4 x i32></i>
+ <4 x i32> <i32 0, i32 4, i32 1, i32 5> <i>; yields <4 x i32></i>
%result = shufflevector <4 x i32> %v1, <4 x i32> undef,
<4 x i32> <i32 0, i32 1, i32 2, i32 3> <i>; yields <4 x i32></i> - Identity shuffle.
</pre>
<h5>Overview:</h5>
-<p>The '<tt>alloca</tt>' instruction allocates memory on the current
-stack frame of the procedure that is live until the current function
+<p>The '<tt>alloca</tt>' instruction allocates memory on the stack frame of the
+currently executing function, to be automatically released when this function
returns to its caller.</p>
<h5>Arguments:</h5>
Instruction</a> </div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = load <ty>* <pointer><br> <result> = volatile load <ty>* <pointer><br></pre>
+<pre> <result> = load <ty>* <pointer>[, align <alignment>]<br> <result> = volatile load <ty>* <pointer>[, align <alignment>]<br></pre>
<h5>Overview:</h5>
<p>The '<tt>load</tt>' instruction is used to read from memory.</p>
<h5>Arguments:</h5>
Instruction</a> </div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> store <ty> <value>, <ty>* <pointer> <i>; yields {void}</i>
- volatile store <ty> <value>, <ty>* <pointer> <i>; yields {void}</i>
+<pre> store <ty> <value>, <ty>* <pointer>[, align <alignment>] <i>; yields {void}</i>
+ volatile store <ty> <value>, <ty>* <pointer>[, align <alignment>] <i>; yields {void}</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>store</tt>' instruction is used to write to memory.</p>
<h5>Arguments:</h5>
<p>There are two arguments to the '<tt>store</tt>' instruction: a value
-to store and an address in which to store it. The type of the '<tt><pointer></tt>'
+to store and an address at which to store it. The type of the '<tt><pointer></tt>'
operand must be a pointer to the type of the '<tt><value></tt>'
operand. If the <tt>store</tt> is marked as <tt>volatile</tt>, then the
optimizer is not allowed to modify the number or order of execution of
on the pointer type that is being indexed into. <a href="#t_pointer">Pointer</a>
and <a href="#t_array">array</a> types can use a 32-bit or 64-bit
<a href="#t_integer">integer</a> type but the value will always be sign extended
-to 64-bits. <a href="#t_struct">Structure</a> types, require <tt>i32</tt>
+to 64-bits. <a href="#t_struct">Structure</a> types require <tt>i32</tt>
<b>constants</b>.</p>
<p>In the example above, the first index is indexing into the '<tt>%ST*</tt>'
<pre>
define i32* %foo(%ST* %s) {
%t1 = getelementptr %ST* %s, i32 1 <i>; yields %ST*:%t1</i>
- %t2 = getelementptr %ST* %t1, i32 0, i32 2 <i>; yields %RT*:%t2</i>
- %t3 = getelementptr %RT* %t2, i32 0, i32 1 <i>; yields [10 x [20 x i32]]*:%t3</i>
+ %t2 = getelementptr %ST* %t1, i32 0, i32 2 <i>; yields %RT*:%t2</i>
+ %t3 = getelementptr %RT* %t2, i32 0, i32 1 <i>; yields [10 x [20 x i32]]*:%t3</i>
%t4 = getelementptr [10 x [20 x i32]]* %t3, i32 0, i32 5 <i>; yields [20 x i32]*:%t4</i>
%t5 = getelementptr [20 x i32]* %t4, i32 0, i32 13 <i>; yields i32*:%t5</i>
ret i32* %t5
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_va_start">'<tt>llvm.va_start</tt>' Intrinsic</a>
+ <a name="int_va_start">'<tt>llvm.va_start</tt>' Intrinsic</a>
</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_va_end">'<tt>llvm.va_end</tt>' Intrinsic</a>
+ <a name="int_va_end">'<tt>llvm.va_end</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Overview:</h5>
<p>The '<tt>llvm.va_end</tt>' intrinsic destroys <tt><arglist></tt>
-which has been initialized previously with <tt><a href="#i_va_start">llvm.va_start</a></tt>
+which has been initialized previously with <tt><a href="#int_va_start">llvm.va_start</a></tt>
or <tt><a href="#i_va_copy">llvm.va_copy</a></tt>.</p>
<h5>Arguments:</h5>
<p>The '<tt>llvm.va_end</tt>' intrinsic works just like the <tt>va_end</tt>
macro available in C. In a target-dependent way, it destroys the <tt>va_list</tt>.
-Calls to <a href="#i_va_start"><tt>llvm.va_start</tt></a> and <a
- href="#i_va_copy"><tt>llvm.va_copy</tt></a> must be matched exactly
+Calls to <a href="#i
nt_va_start"><tt>llvm.va_start</tt></a> and <a
+ href="#int_va_copy"><tt>llvm.va_copy</tt></a> must be matched exactly
with calls to <tt>llvm.va_end</tt>.</p>
</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_va_copy">'<tt>llvm.va_copy</tt>' Intrinsic</a>
+ <a name="int_va_copy">'<tt>llvm.va_copy</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<p>The '<tt>llvm.va_copy</tt>' intrinsic works just like the <tt>va_copy</tt> macro
available in C. In a target-dependent way, it copies the source
<tt>va_list</tt> element into the destination list. This intrinsic is necessary
-because the <tt><a href="#i_va_start">llvm.va_start</a></tt> intrinsic may be
+because the <tt><a href="#int_va_start">llvm.va_start</a></tt> intrinsic may be
arbitrarily complex and require memory allocation, for example.</p>
</div>
<p>
LLVM support for <a href="GarbageCollection.html">Accurate Garbage
Collection</a> requires the implementation and generation of these intrinsics.
-These intrinsics allow identification of <a href="#i_gcroot">GC roots on the
+These intrinsics allow identification of <a href="#int_gcroot">GC roots on the
stack</a>, as well as garbage collector implementations that require <a
-href="#i_gcread">read</a> and <a href="#i_gcwrite">write</a> barriers.
+href="#int_gcread">read</a> and <a href="#int_gcwrite">write</a> barriers.
Front-ends for type-safe garbage collected languages should generate these
intrinsics to make use of the LLVM garbage collectors. For more details, see <a
href="GarbageCollection.html">Accurate Garbage Collection with LLVM</a>.
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_gcroot">'<tt>llvm.gcroot</tt>' Intrinsic</a>
+ <a name="int_gcroot">'<tt>llvm.gcroot</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_gcread">'<tt>llvm.gcread</tt>' Intrinsic</a>
+ <a name="int_gcread">'<tt>llvm.gcread</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_gcwrite">'<tt>llvm.gcwrite</tt>' Intrinsic</a>
+ <a name="int_gcwrite">'<tt>llvm.gcwrite</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a>
+ <a name="int_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_frameaddress">'<tt>llvm.frameaddress</tt>' Intrinsic</a>
+ <a name="int_frameaddress">'<tt>llvm.frameaddress</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a>
+ <a name="int_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<p>
The '<tt>llvm.stacksave</tt>' intrinsic is used to remember the current state of
-the function stack, for use with <a href="#i_stackrestore">
+the function stack, for use with <a href="#int_stackrestore">
<tt>llvm.stackrestore</tt></a>. This is useful for implementing language
features like scoped automatic variable sized arrays in C99.
</p>
<p>
This intrinsic returns a opaque pointer value that can be passed to <a
-href="#i_stackrestore"><tt>llvm.stackrestore</tt></a>. When an
+href="#int_stackrestore"><tt>llvm.stackrestore</tt></a>. When an
<tt>llvm.stackrestore</tt> intrinsic is executed with a value saved from
<tt>llvm.stacksave</tt>, it effectively restores the state of the stack to the
state it was in when the <tt>llvm.stacksave</tt> intrinsic executed. In
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_stackrestore">'<tt>llvm.stackrestore</tt>' Intrinsic</a>
+ <a name="int_stackrestore">'<tt>llvm.stackrestore</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<p>
The '<tt>llvm.stackrestore</tt>' intrinsic is used to restore the state of
the function stack to the state it was in when the corresponding <a
-href="#i_stacksave"><tt>llvm.stacksave</tt></a> intrinsic executed. This is
+href="#int_stacksave"><tt>llvm.stacksave</tt></a> intrinsic executed. This is
useful for implementing language features like scoped automatic variable sized
arrays in C99.
</p>
<h5>Semantics:</h5>
<p>
-See the description for <a href="#i_stacksave"><tt>llvm.stacksave</tt></a>.
+See the description for <a href="#int_stacksave"><tt>llvm.stacksave</tt></a>.
</p>
</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a>
+ <a name="int_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a>
+ <a name="int_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_readcyclecounter">'<tt>llvm.readcyclecounter</tt>' Intrinsic</a>
+ <a name="int_readcyclecounter">'<tt>llvm.readcyclecounter</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_memcpy">'<tt>llvm.memcpy</tt>' Intrinsic</a>
+ <a name="int_memcpy">'<tt>llvm.memcpy</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_memmove">'<tt>llvm.memmove</tt>' Intrinsic</a>
+ <a name="int_memmove">'<tt>llvm.memmove</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_memset">'<tt>llvm.memset.*</tt>' Intrinsics</a>
+ <a name="int_memset">'<tt>llvm.memset.*</tt>' Intrinsics</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_sqrt">'<tt>llvm.sqrt.*</tt>' Intrinsic</a>
+ <a name="int_sqrt">'<tt>llvm.sqrt.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_powi">'<tt>llvm.powi.*</tt>' Intrinsic</a>
+ <a name="int_powi">'<tt>llvm.powi.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_bswap">'<tt>llvm.bswap.*</tt>' Intrinsics</a>
+ <a name="int_bswap">'<tt>llvm.bswap.*</tt>' Intrinsics</a>
</div>
<div class="doc_text">
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="int_bit_and_reduce">'<tt>llvm.bit.and.reduce.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.and.reduce</tt> on
-any integer bit width.
-<pre>
- declare i1 @llvm.bit.and.reduce.i32(i32 %val)
- declare i1 @llvm.bit.and.reduce.i97(i97 %val)
-</pre>
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.and.reduce</tt>' family of intrinsic functions applies the
-AND operator bitwise to each bit in <tt>%val</tt> until it yields the result.
-</p>
-
-<h5>Arguments:</h5>
-<p>The argument may be any bit width. The result is always a 1-bit integer.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.and.reduce</tt>' intrinsic is the equivalent of a test
-against <tt>-1</tt>. Only if all bits in <tt>%val</tt> are set will the result
-be 1, otherwise 0.</p>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_or_reduce">'<tt>llvm.bit.or.reduce.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.or.reduce</tt> on
-any integer bit width.
-<pre>
- declare i1 @llvm.bit.or.reduce.i32(i32 %val)
- declare i1 @llvm.bit.or.reduce.i97(i97 %val)
-</pre>
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.or.reduce</tt>' family of intrinsic functions applies the
-OR operator bitwise to each bit in <tt>%val</tt> until it yields the result.
-</p>
-
-<h5>Arguments:</h5>
-<p>The argument may be any bit width. The result is always a 1-bit integer.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.or.reduce</tt>' intrinsic is the equivalent of a test
-against <tt>0</tt>. Only if all bits in <tt>%val</tt> are clear will the result
-be 0, otherwise 1.</p>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_xor_reduce">'<tt>llvm.bit.xor.reduce.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.xor.reduce</tt> on
-any integer bit width.
-<pre>
- declare i1 @llvm.bit.xor.reduce.i32(i32 %val)
- declare i1 @llvm.bit.xor.reduce.i97(i97 %val)
-</pre>
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.xor.reduce</tt>' family of intrinsic functions applies the
-XOR operator bitwise to each bit in <tt>%val</tt> until it yields the result.
-</p>
-
-<h5>Arguments:</h5>
-<p>The argument may be any bit width. The result is always a 1-bit integer.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.xor.reduce</tt>' computes its result by performing an XOR
-operation on the two lowest order bits in <tt>%val</tt>. That result is then
-XOR'd with the next bit in <tt>%val</tt> and this process continues until all
-bits in <tt>%val</tt> have been XOR'd with the result of the previous XORs. The
-resulting bit is returned.</p>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_nand_reduce">'<tt>llvm.bit.nand.reduce.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.nand.reduce</tt> on
-any integer bit width.
-<pre>
- declare i1 @llvm.bit.nand.reduce.i32(i32 %val)
- declare i1 @llvm.bit.nand.reduce.i97(i97 %val)
-</pre>
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.nand.reduce</tt>' family of intrinsic functions applies the
-NAND operator bitwise to each bit in <tt>%val</tt> until it yields the result.
-</p>
-
-<h5>Arguments:</h5>
-<p>The argument may be any bit width. The result is always a 1-bit integer.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.nand.reduce</tt>' intrinsic is the equivalent of taking the
-complement of the <tt>llvm.bit.and.reduce</tt> intrinsic. That is, it returns 0
-if <tt>%val</tt> is all ones (-1) and 1 otherwise.</p>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_nor_reduce">'<tt>llvm.bit.nor.reduce.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.nor.reduce</tt> on
-any integer bit width.
-<pre>
- declare i1 @llvm.bit.nor.reduce.i32(i32 %val)
- declare i1 @llvm.bit.nor.reduce.i97(i97 %val)
-</pre>
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.nor.reduce</tt>' family of intrinsic functions applies the
-NOR operator bitwise to each bit in <tt>%val</tt> until it yields the result.
-</p>
-
-<h5>Arguments:</h5>
-<p>The argument may be any bit width. The result is always a 1-bit integer.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.nor.reduce</tt>' intrinsic is equivalent to the complement
-of the <tt>llvm.bit.or.reduce</tt> intrinsic. That is, it returns 1 if all bits
-in <tt>%val</tt> are 0, and 1 otherwise.</p>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_nxor_reduce">'<tt>llvm.bit.nxor.reduce.*</tt>' Intrinsic</a>
+ <a name="int_part_select">'<tt>llvm.part.select.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.nxor.reduce</tt> on
-any integer bit width.
-<pre>
- declare i1 @llvm.bit.nxor.reduce.i32(i32 %val)
- declare i1 @llvm.bit.nxor.reduce.i97(i97 %val)
-</pre>
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.nxor.reduce</tt>' family of intrinsic functions applies the
-AND operator bitwise to each bit in <tt>%val</tt> until it yields the result.
-</p>
-
-<h5>Arguments:</h5>
-<p>The argument may be any bit width. The result is always a 1-bit integer.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.nxor.reduce</tt>' intrinsic is the equivalent of the
-complement of the <tt>llvm.bit.xor.reduce</tt> intrinsic.</p>
-</div>
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_select">'<tt>llvm.bit.select.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.select</tt> on any
-integer bit width.
-<pre>
- declare i1 @llvm.bit.select.i17 (i17 %val, i32 %bit)
- declare i1 @llvm.bit.select.i29 (i29 %val, i32 %bit)
-</pre>
-
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.select</tt>' family of intrinsic functions selects a
-specific bit from an integer value and returns it.</p>
-
-<h5>Arguments:</h5>
-<p>The two arguments may be any bit width. The result is always a 1-bit
-integer. The first argument, <tt>%val</tt> may be any bit width and is the
-value from which the bit is selected. The second argument, <tt>%bit</tt> must
-be an <tt>i32</tt> and is the bit index of the bit to be selected. Bits are
-numbered starting with 0 as the lowest ordered bit.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.select</tt>' intrinsic is the equivalent of shift and a
-truncate operation. The <tt>%val</tt> is shifted right by <tt>%bit</tt> bits and
-then truncated to a 1-bit integer.</p>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_set">'<tt>llvm.bit.set.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.set</tt> on any
-integer bit width.
-<pre>
- declare i17 @llvm.bit.set.i17.i17 (i17 %val, i32 %bit)
- declare i52 @llvm.bit.set.i52.i52 (i52 %val, i32 %bit)
-</pre>
-
-<h5>Overview:</h5>
-<p>
-The '<tt>llvm.bit.set</tt>' family of intrinsic functions sets a specific bit in
-a <tt>%val</tt> and returns the result.</p>
-
-<h5>Arguments:</h5>
-<p>The result and the first argument, <tt>%val</tt>, may be an integer of any
-bit width, but they must be the same bit width. The second argument must be an
-<tt>i32</tt>.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.set</tt>' intrinsic is the equivalent of creating a bit
-mask for the <tt>%bit</tt> requested in the width of <tt>%val</tt>, ORing that
-mask with <tt>%val</tt> and returning the result.</p>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_clear">'<tt>llvm.bit.clear.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.clear</tt> on any
-integer bit width.
-<pre>
- declare i17 @llvm.bit.clear.i17.i17 (i17 %val, i32 %bit)
- declare i29 @llvm.bit.clear.i29.i29 (i29 %val, i32 %bit)
-</pre>
-
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.clear</tt>' family of intrinsic functions clears a specific
-bit in a value and returns the result.</p>
-
-<h5>Arguments:</h5>
-<p>The result and the first argument, <tt>%val</tt>, may be an integer of any
-bit width, but they must be the same bit width. The second argument must be an
-<tt>i32</tt>.</p>
-
-<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.clear</tt>' intrinsic is the equivalent of making a bit
-mask in the width of <tt>%val</tt> but with the bit at index <tt>%bit</tt> set
-to zero, ANDing that mask with <tt>%val</tt> and returning the result.</p>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_concat">'<tt>llvm.bit.concat.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.concat</tt> on any
-integer bit width.
-<pre>
- declare i32 @llvm.bit.concat.i32.i17.i15 (i17 %hi, i15 %lo)
- declare i29 @llvm.bit.concat.i29.i12.i15 (i12 %hi, i15 %lo)
-</pre>
-
-<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.concat</tt>' family of intrinsic functions concatenates two
-integer values to produce a longer one.</p>
-
-<h5>Arguments:</h5>
-<p>The two arguments may be any bit width. The result must be an integer type
-whose bit width is the sum of the arguments' bit widths. The first argument,
-<tt>%hi</tt>, represents the bits that will occupy the high order bit locations
-in the concatenated result. The second argument, <tt>%lo</tt>, will occupy the
-lower order bit locations in the result.</p>
-
-<h5>Semantics:</h5>
-
-<p>The '<tt>llvm.bit.concat</tt>' intrinsic is the equivalent of two
-<tt>zext</tt> instructions, a <tt>shl</tt> and an <tt>or</tt>. The operation
-proceeds as follows:</p>
-<ol>
- <li>Each of the arguments is <tt>zext</tt>'d to the result bit width.</li>
- <li>The <tt>%hi</tt> argument is shift left by the width of the <tt>%lo</tt>
- argument (shifted into to high order bits).</li>
- <li>The shifted <tt>%hi</tt> value and <tt>%lo</tt> are <tt>or</tt>'d together
- to form the result.</li>
-</ol>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="int_bit_part_select">'<tt>llvm.bit.part.select.*</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.part.select</tt>
+<p>This is an overloaded intrinsic. You can use <tt>llvm.part.select</tt>
on any integer bit width.
<pre>
- declare i17 @llvm.bit.part.select.i17.i17 (i17 %val, i32 %loBit, i32 %hiBit)
- declare i29 @llvm.bit.part.select.i29.i29 (i29 %val, i32 %loBit, i32 %hiBit)
+ declare i17 @llvm.part.select.i17.i17 (i17 %val, i32 %loBit, i32 %hiBit)
+ declare i29 @llvm.part.select.i29.i29 (i29 %val, i32 %loBit, i32 %hiBit)
</pre>
<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.part.select</tt>' family of intrinsic functions selects a
+<p>The '<tt>llvm.part.select</tt>' family of intrinsic functions selects a
range of bits from an integer value and returns them in the same bit width as
the original value.</p>
<h5>Arguments:</h5>
<p>The first argument, <tt>%val</tt> and the result may be integer types of
any bit width but they must have the same bit width. The second and third
-arguments must be <tt>i32</tt> type.</p>
+arguments must be <tt>i32</tt> type since they specify only a bit index.</p>
<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.part.select</tt>' intrinsic is the equivalent of shifting
-<tt>%val</tt> right by <tt>%loBit</tt> bits and then ANDing it with a mask with
+<p>The operation of the '<tt>llvm.part.select</tt>' intrinsic has two modes
+of operation: forwards and reverse. If <tt>%loBit</tt> is greater than
+<tt>%hiBits</tt> then the intrinsic operates in reverse mode. Otherwise it
+operates in forward mode.</p>
+<p>In forward mode, this intrinsic is the equivalent of shifting <tt>%val</tt>
+right by <tt>%loBit</tt> bits and then ANDing it with a mask with
only the <tt>%hiBit - %loBit</tt> bits set, as follows:</p>
<ol>
<li>The <tt>%val</tt> is shifted right (LSHR) by the number of bits specified
<li>A mask of the retained bits is created by shifting a -1 value.</li>
<li>The mask is ANDed with <tt>%val</tt> to produce the result.
</ol>
+<p>In reverse mode, a similar computation is made except that:</p>
+<ol>
+ <li>The bits selected wrap around to include both the highest and lowest bits.
+ For example, part.select(i16 X, 4, 7) selects bits from X with a mask of
+ 0x00F0 (forwards case) while part.select(i16 X, 8, 3) selects bits from X
+ with a mask of 0xFF0F.</li>
+ <li>The bits returned in the reverse case are reversed. So, if X has the value
+ 0x6ACF and we apply part.select(i16 X, 8, 3) to it, we get back the value
+ 0x0A6F.</li>
+</ol>
</div>
-<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="int_bit_part_set">'<tt>llvm.bit.part.set.*</tt>' Intrinsic</a>
+ <a name="int_part_set">'<tt>llvm.part.set.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.part.set</tt> on
-any integer bit width.
+<p>This is an overloaded intrinsic. You can use <tt>llvm.part.set</tt>
+on any integer bit width.
<pre>
- declare i17 @llvm.bit.part.set.i17.i17.i9 (i17 %val, i32 %bit, i9 %newbits)
- declare i29 @llvm.bit.part.set.i29.i29.i13(i29 %val, i32 %bit, i13 %newbits)
+ declare i17 @llvm.part.set.i17.i17.i9 (i17 %val, i9 %repl, i32 %lo, i32 %hi)
+ declare i29 @llvm.part.set.i29.i29.i9 (i29 %val, i9 %repl, i32 %lo, i32 %hi)
</pre>
<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.part.set</tt>' family of intrinsic functions sets a range
-of bits in a given value to a new value and returns the result.</p>
+<p>The '<tt>llvm.part.set</tt>' family of intrinsic functions replaces a range
+of bits in an integer value with another integer value. It returns the integer
+with the replaced bits.</p>
<h5>Arguments:</h5>
-<p>The first argument and the result may be an integer type of any bit width but
-they must have the same bit width. The second argument must be an <tt>i32</tt>.
-The third argument may be any any bit width less than or equal to the bit width
-of the first argument.</p>
+<p>The first argument, <tt>%val</tt> and the result may be integer types of
+any bit width but they must have the same bit width. <tt>%val</tt> is the value
+whose bits will be replaced. The second argument, <tt>%repl</tt> may be an
+integer of any bit width. The third and fourth arguments must be <tt>i32</tt>
+type since they specify only a bit index.</p>
<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.part.set</tt>' intrinsic sets the value given by
-<tt>%newbits</tt> into <tt>%val</tt> at the bit index given by <tt>%bit</tt>.
-This is equivalent to the following sequence:</p>
-<ol>
- <li>The bits in <tt>%val</tt> starting at <tt>%bit</tt> and up to the width
- of <tt>%newbits</tt> are cleared by ANDing them with a zero mask.</li>
- <li>The bits in <tt>%newbits</tt> are shifted left by <tt>%bit</tt> bits.
- <li>The shifted <tt>%newbits</tt> value is OR'd into <tt>%val</tt> to produce
- the result.</li>
-</ol>
+<p>The operation of the '<tt>llvm.part.set</tt>' intrinsic has two modes
+of operation: forwards and reverse. If <tt>%lo</tt> is greater than
+<tt>%hi</tt> then the intrinsic operates in reverse mode. Otherwise it
+operates in forward mode.</p>
+<p>For both modes, the <tt>%repl</tt> value is prepared for use by either
+truncating it down to the size of the replacement area or zero extending it
+up to that size.</p>
+<p>In forward mode, the bits between <tt>%lo</tt> and <tt>%hi</tt> (inclusive)
+are replaced with corresponding bits from <tt>%repl</tt>. That is the 0th bit
+in <tt>%repl</tt> replaces the <tt>%lo</tt>th bit in <tt>%val</tt> and etc. up
+to the <tt>%hi</tt>th bit.
+<p>In reverse mode, a similar computation is made except that the bits replaced
+wrap around to include both the highest and lowest bits. For example, if a
+16 bit value is being replaced then <tt>%lo=8</tt> and <tt>%hi=4</tt> would
+cause these bits to be set: <tt>0xFF1F</tt>.</p>
+<h5>Examples:</h5>
+<pre>
+ llvm.part.set(0xFFFF, 0, 4, 7) -> 0xFF0F
+ llvm.part.set(0xFFFF, 0, 7, 4) -> 0x0060
+ llvm.part.set(0xFFFF, 0, 8, 3) -> 0x00F0
+ llvm.part.set(0xFFFF, 0, 3, 8) -> 0xFE07
+</pre>
</div>
<!-- ======================================================================= -->
projects / oota-llvm.git / blobdiff