<li><a href="#int_ctpop">'<tt>llvm.ctpop.*</tt>' Intrinsic </a></li>
<li><a href="#int_ctlz">'<tt>llvm.ctlz.*</tt>' Intrinsic </a></li>
<li><a href="#int_cttz">'<tt>llvm.cttz.*</tt>' Intrinsic </a></li>
- <li><a href="#int_bit_part_select">'<tt>llvm.part.select.*</tt>' Intrinsic </a></li>
+ <li><a href="#int_part_select">'<tt>llvm.part.select.*</tt>' Intrinsic </a></li>
+ <li><a href="#int_part_set">'<tt>llvm.part.set.*</tt>' Intrinsic </a></li>
</ol>
</li>
<li><a href="#int_debugger">Debugger intrinsics</a></li>
until linked, if not linked, the symbol becomes null instead of being an
undefined reference.
</dd>
-</dl>
<dt><tt><b><a name="linkage_external">externally visible</a></b></tt>:</dt>
visible, meaning that it participates in linkage and can be used to resolve
external symbol references.
</dd>
+</dl>
<p>
The next two types of linkage are targeted for Microsoft Windows platform
<p>It is illegal for a function <i>declaration</i>
to have any linkage type other than "externally visible", <tt>dllimport</tt>,
or <tt>extern_weak</tt>.</p>
-
+<p>Aliases can have only <tt>external</tt>, <tt>internal</tt> and <tt>weak</tt>
+linkages.
</div>
<!-- ======================================================================= -->
<p>Global variables define regions of memory allocated at compilation time
instead of run-time. Global variables may optionally be initialized, may have
-an explicit section to be placed in, and may
-have an optional explicit alignment specified. A
-variable may be defined as a global "constant," which indicates that the
-contents of the variable will <b>never</b> be modified (enabling better
+an explicit section to be placed in, and may have an optional explicit alignment
+specified. A variable may be defined as "thread_local", which means that it
+will not be shared by threads (each thread will have a separated copy of the
+variable). A variable may be defined as a global "constant," which indicates
+that the contents of the variable will <b>never</b> be modified (enabling better
optimization, allowing the global data to be placed in the read-only section of
an executable, etc). Note that variables that need runtime initialization
cannot be marked "constant" as there is a store to the variable.</p>
</div>
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+ <a name="aliasstructure">Aliases</a>
+</div>
+<div class="doc_text">
+ <p>Aliases act as "second name" for the aliasee value (which can be either
+ function or global variable). Aliases may have an
+ optional <a href="#linkage">linkage type</a>, and an
+ optional <a href="#visibility">visibility style</a>.</p>
+
+ <h5>Syntax:</h5>
+
+ <pre>
+ @<Name> = [Linkage] [Visibility] alias <AliaseeTy> @<Aliasee>
+ </pre>
+
+</div>
+
+
+
<!-- ======================================================================= -->
<div class="doc_subsection"><a name="paramattrs">Parameter Attributes</a></div>
<div class="doc_text">
<div class="doc_text">
<p>A module may specify a target specific data layout string that specifies how
-data is to be laid out in memory. The syntax for the data layout is simply:<br/>
-<pre> target datalayout = "<i>layout specification</i>"
-</pre>
-The <i>layout specification</i> consists of a list of specifications separated
-by the minus sign character ('-'). Each specification starts with a letter
-and may include other information after the letter to define some aspect of the
-data layout. The specifications accepted are as follows: </p>
+data is to be laid out in memory. The syntax for the data layout is simply:</p>
+<pre> target datalayout = "<i>layout specification</i>"</pre>
+<p>The <i>layout specification</i> consists of a list of specifications
+separated by the minus sign character ('-'). Each specification starts with a
+letter and may include other information after the letter to define some
+aspect of the data layout. The specifications accepted are as follows: </p>
<dl>
<dt><tt>E</tt></dt>
<dd>Specifies that the target lays out data in big-endian form. That is, the
<h5>Examples:</h5>
<table class="layout">
<tr class="layout">
- <td class="left">
- <tt>{ i32, i32, i32 }</tt><br/>
- <tt>{ float, i32 (i32) * }</tt><br/>
- </td>
- <td class="left">
- a triple of three <tt>i32</tt> values<br/>
- A pair, where the first element is a <tt>float</tt> and the second element
- is a <a href="#t_pointer">pointer</a> to a <a href="#t_function">function</a>
- that takes an <tt>i32</tt>, returning an <tt>i32</tt>.<br/>
- </td>
+ <td class="left"><tt>{ i32, i32, i32 }</tt></td>
+ <td class="left">A triple of three <tt>i32</tt> values</td>
+ </tr><tr class="layout">
+ <td class="left"><tt>{ float, i32 (i32) * }</tt></td>
+ <td class="left">A pair, where the first element is a <tt>float</tt> and the
+ second element is a <a href="#t_pointer">pointer</a> to a
+ <a href="#t_function">function</a> that takes an <tt>i32</tt>, returning
+ an <tt>i32</tt>.</td>
</tr>
</table>
</div>
<h5>Examples:</h5>
<table class="layout">
<tr class="layout">
- <td class="left">
- <tt> < { i32, i32, i32 } > </tt><br/>
- <tt> < { float, i32 (i32) * } > </tt><br/>
- </td>
- <td class="left">
- a triple of three <tt>i32</tt> values<br/>
- A pair, where the first element is a <tt>float</tt> and the second element
- is a <a href="#t_pointer">pointer</a> to a <a href="#t_function">function</a>
- that takes an <tt>i32</tt>, returning an <tt>i32</tt>.<br/>
- </td>
+ <td class="left"><tt>< { i32, i32, i32 } ></tt></td>
+ <td class="left">A triple of three <tt>i32</tt> values</td>
+ </tr><tr class="layout">
+ <td class="left"><tt>< { float, i32 (i32) * } ></tt></td>
+ <td class="left">A pair, where the first element is a <tt>float</tt> and the
+ second element is a <a href="#t_pointer">pointer</a> to a
+ <a href="#t_function">function</a> that takes an <tt>i32</tt>, returning
+ an <tt>i32</tt>.</td>
</tr>
</table>
</div>
<dd>Vector constants are represented with notation similar to vector type
definitions (a comma separated list of elements, surrounded by
less-than/greater-than's (<tt><></tt>)). For example: "<tt>< i32 42,
- i32 11, i32 74, i32 100 ></tt>". VEctor constants must have <a
+ i32 11, i32 74, i32 100 ></tt>". Vector constants must have <a
href="#t_vector">vector type</a>, and the number and types of elements must
match those specified by the type.
</dd>
<h5>Example:</h5>
<pre>
- %retval = invoke i32 %Test(i32 15) to label %Continue
- unwind label %TestCleanup <i>; {i32}:retval set</i>
- %retval = invoke <a href="#callingconv">coldcc</a> i32 %Test(i32 15) to label %Continue
- unwind label %TestCleanup <i>; {i32}:retval set</i>
+ %retval = invoke i32 %Test(i32 15) to label %Continue
+ unwind label %TestCleanup <i>; {i32}:retval set</i>
+ %retval = invoke <a href="#callingconv">coldcc</a> i32 %Test(i32 15) to label %Continue
+ unwind label %TestCleanup <i>; {i32}:retval set</i>
</pre>
</div>
<p>The '<tt>fdiv</tt>' instruction returns the quotient of its two
operands.</p>
<h5>Arguments:</h5>
-<p>The two arguments to the '<tt>div</tt>' instruction must be
+<p>The two arguments to the '<tt>fdiv</tt>' instruction must be
<a href="#t_floating">floating point</a> values. Both arguments must have
identical types. This instruction can also take <a href="#t_vector">vector</a>
-versions of the values in which case the elements must be floating point.</p>
+versions of floating point values.</p>
<h5>Semantics:</h5>
<p>The value produced is the floating point quotient of the two operands.</p>
<h5>Example:</h5>
<h5>Overview:</h5>
<p>The '<tt>lshr</tt>' instruction (logical shift right) returns the first
-operand shifted to the right a specified number of bits.</p>
+operand shifted to the right a specified number of bits with zero fill.</p>
<h5>Arguments:</h5>
<p>Both arguments to the '<tt>lshr</tt>' instruction must be the same
<h5>Overview:</h5>
<p>The '<tt>ashr</tt>' instruction (arithmetic shift right) returns the first
-operand shifted to the right a specified number of bits.</p>
+operand shifted to the right a specified number of bits with sign extension.</p>
<h5>Arguments:</h5>
<p>Both arguments to the '<tt>ashr</tt>' instruction must be the same
<div class="doc_text">
<p>LLVM supports several instructions to represent vector operations in a
-target-independent manner. This instructions cover the element-access and
+target-independent manner. These instructions cover the element-access and
vector-specific operations needed to process vectors effectively. While LLVM
does directly support these vector operations, many sophisticated algorithms
will want to use target-specific intrinsics to take full advantage of a specific
<pre>
%result = shufflevector <4 x i32> %v1, <4 x i32> %v2,
- <4 x i32> <i32 0, i32 4, i32 1, i32 5> <i>; yields <4 x i32></i>
+ <4 x i32> <i32 0, i32 4, i32 1, i32 5> <i>; yields <4 x i32></i>
%result = shufflevector <4 x i32> %v1, <4 x i32> undef,
<4 x i32> <i32 0, i32 1, i32 2, i32 3> <i>; yields <4 x i32></i> - Identity shuffle.
</pre>
<h5>Overview:</h5>
-<p>The '<tt>alloca</tt>' instruction allocates memory on the current
-stack frame of the procedure that is live until the current function
+<p>The '<tt>alloca</tt>' instruction allocates memory on the stack frame of the
+currently executing function, to be automatically released when this function
returns to its caller.</p>
<h5>Arguments:</h5>
Instruction</a> </div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = load <ty>* <pointer><br> <result> = volatile load <ty>* <pointer><br></pre>
+<pre> <result> = load <ty>* <pointer>[, align <alignment>]<br> <result> = volatile load <ty>* <pointer>[, align <alignment>]<br></pre>
<h5>Overview:</h5>
<p>The '<tt>load</tt>' instruction is used to read from memory.</p>
<h5>Arguments:</h5>
Instruction</a> </div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> store <ty> <value>, <ty>* <pointer> <i>; yields {void}</i>
- volatile store <ty> <value>, <ty>* <pointer> <i>; yields {void}</i>
+<pre> store <ty> <value>, <ty>* <pointer>[, align <alignment>] <i>; yields {void}</i>
+ volatile store <ty> <value>, <ty>* <pointer>[, align <alignment>] <i>; yields {void}</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>store</tt>' instruction is used to write to memory.</p>
<h5>Arguments:</h5>
<p>There are two arguments to the '<tt>store</tt>' instruction: a value
-to store and an address in which to store it. The type of the '<tt><pointer></tt>'
+to store and an address at which to store it. The type of the '<tt><pointer></tt>'
operand must be a pointer to the type of the '<tt><value></tt>'
operand. If the <tt>store</tt> is marked as <tt>volatile</tt>, then the
optimizer is not allowed to modify the number or order of execution of
on the pointer type that is being indexed into. <a href="#t_pointer">Pointer</a>
and <a href="#t_array">array</a> types can use a 32-bit or 64-bit
<a href="#t_integer">integer</a> type but the value will always be sign extended
-to 64-bits. <a href="#t_struct">Structure</a> types, require <tt>i32</tt>
+to 64-bits. <a href="#t_struct">Structure</a> types require <tt>i32</tt>
<b>constants</b>.</p>
<p>In the example above, the first index is indexing into the '<tt>%ST*</tt>'
<pre>
define i32* %foo(%ST* %s) {
%t1 = getelementptr %ST* %s, i32 1 <i>; yields %ST*:%t1</i>
- %t2 = getelementptr %ST* %t1, i32 0, i32 2 <i>; yields %RT*:%t2</i>
- %t3 = getelementptr %RT* %t2, i32 0, i32 1 <i>; yields [10 x [20 x i32]]*:%t3</i>
+ %t2 = getelementptr %ST* %t1, i32 0, i32 2 <i>; yields %RT*:%t2</i>
+ %t3 = getelementptr %RT* %t2, i32 0, i32 1 <i>; yields [10 x [20 x i32]]*:%t3</i>
%t4 = getelementptr [10 x [20 x i32]]* %t3, i32 0, i32 5 <i>; yields [20 x i32]*:%t4</i>
%t5 = getelementptr [20 x i32]* %t4, i32 0, i32 13 <i>; yields i32*:%t5</i>
ret i32* %t5
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="int_bit_part_select">'<tt>llvm.bit.part.select.*</tt>' Intrinsic</a>
+ <a name="int_part_select">'<tt>llvm.part.select.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.part.select</tt>
+<p>This is an overloaded intrinsic. You can use <tt>llvm.part.select</tt>
on any integer bit width.
<pre>
- declare i17 @llvm.bit.part.select.i17.i17 (i17 %val, i32 %loBit, i32 %hiBit)
- declare i29 @llvm.bit.part.select.i29.i29 (i29 %val, i32 %loBit, i32 %hiBit)
+ declare i17 @llvm.part.select.i17.i17 (i17 %val, i32 %loBit, i32 %hiBit)
+ declare i29 @llvm.part.select.i29.i29 (i29 %val, i32 %loBit, i32 %hiBit)
</pre>
<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.part.select</tt>' family of intrinsic functions selects a
+<p>The '<tt>llvm.part.select</tt>' family of intrinsic functions selects a
range of bits from an integer value and returns them in the same bit width as
the original value.</p>
arguments must be <tt>i32</tt> type since they specify only a bit index.</p>
<h5>Semantics:</h5>
-<p>The operation of the '<tt>llvm.bit.part.select</tt>' intrinsic has two modes
+<p>The operation of the '<tt>llvm.part.select</tt>' intrinsic has two modes
of operation: forwards and reverse. If <tt>%loBit</tt> is greater than
<tt>%hiBits</tt> then the intrinsic operates in reverse mode. Otherwise it
operates in forward mode.</p>
<p>In reverse mode, a similar computation is made except that:</p>
<ol>
<li>The bits selected wrap around to include both the highest and lowest bits.
- For example, part_select(i16 X, 4, 7) selects bits from X with a mask of
- 0x00F0 (forwards case) while part_select(i16 X, 8, 3) selects bits from X
+ For example, part.select(i16 X, 4, 7) selects bits from X with a mask of
+ 0x00F0 (forwards case) while part.select(i16 X, 8, 3) selects bits from X
with a mask of 0xFF0F.</li>
<li>The bits returned in the reverse case are reversed. So, if X has the value
- 0x6ACF and we apply part_select(i16 X, 8, 3) to it, we get back the value
+ 0x6ACF and we apply part.select(i16 X, 8, 3) to it, we get back the value
0x0A6F.</li>
</ol>
</div>
-<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="int_bit_part_set">'<tt>llvm.bit.part.set.*</tt>' Intrinsic</a>
+ <a name="int_part_set">'<tt>llvm.part.set.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
-<p>This is an overloaded intrinsic. You can use <tt>llvm.bit.part.set</tt> on
-any integer bit width.
+<p>This is an overloaded intrinsic. You can use <tt>llvm.part.set</tt>
+on any integer bit width.
<pre>
- declare i17 @llvm.bit.part.set.i17.i17.i9 (i17 %val, i32 %bit, i9 %newbits)
- declare i29 @llvm.bit.part.set.i29.i29.i13(i29 %val, i32 %bit, i13 %newbits)
+ declare i17 @llvm.part.set.i17.i17.i9 (i17 %val, i9 %repl, i32 %lo, i32 %hi)
+ declare i29 @llvm.part.set.i29.i29.i9 (i29 %val, i9 %repl, i32 %lo, i32 %hi)
</pre>
<h5>Overview:</h5>
-<p>The '<tt>llvm.bit.part.set</tt>' family of intrinsic functions sets a range
-of bits in a given value to a new value and returns the result.</p>
+<p>The '<tt>llvm.part.set</tt>' family of intrinsic functions replaces a range
+of bits in an integer value with another integer value. It returns the integer
+with the replaced bits.</p>
<h5>Arguments:</h5>
-<p>The first argument and the result may be an integer type of any bit width but
-they must have the same bit width. The second argument must be an <tt>i32</tt>.
-The third argument may be any any bit width less than or equal to the bit width
-of the first argument.</p>
+<p>The first argument, <tt>%val</tt> and the result may be integer types of
+any bit width but they must have the same bit width. <tt>%val</tt> is the value
+whose bits will be replaced. The second argument, <tt>%repl</tt> may be an
+integer of any bit width. The third and fourth arguments must be <tt>i32</tt>
+type since they specify only a bit index.</p>
<h5>Semantics:</h5>
-<p>The '<tt>llvm.bit.part.set</tt>' intrinsic sets the value given by
-<tt>%newbits</tt> into <tt>%val</tt> at the bit index given by <tt>%bit</tt>.
-This is equivalent to the following sequence:</p>
-<ol>
- <li>The bits in <tt>%val</tt> starting at <tt>%bit</tt> and up to the width
- of <tt>%newbits</tt> are cleared by ANDing them with a zero mask.</li>
- <li>The bits in <tt>%newbits</tt> are shifted left by <tt>%bit</tt> bits.
- <li>The shifted <tt>%newbits</tt> value is OR'd into <tt>%val</tt> to produce
- the result.</li>
-</ol>
+<p>The operation of the '<tt>llvm.part.set</tt>' intrinsic has two modes
+of operation: forwards and reverse. If <tt>%lo</tt> is greater than
+<tt>%hi</tt> then the intrinsic operates in reverse mode. Otherwise it
+operates in forward mode.</p>
+<p>For both modes, the <tt>%repl</tt> value is prepared for use by either
+truncating it down to the size of the replacement area or zero extending it
+up to that size.</p>
+<p>In forward mode, the bits between <tt>%lo</tt> and <tt>%hi</tt> (inclusive)
+are replaced with corresponding bits from <tt>%repl</tt>. That is the 0th bit
+in <tt>%repl</tt> replaces the <tt>%lo</tt>th bit in <tt>%val</tt> and etc. up
+to the <tt>%hi</tt>th bit.
+<p>In reverse mode, a similar computation is made except that the bits replaced
+wrap around to include both the highest and lowest bits. For example, if a
+16 bit value is being replaced then <tt>%lo=8</tt> and <tt>%hi=4</tt> would
+cause these bits to be set: <tt>0xFF1F</tt>.</p>
+<h5>Examples:</h5>
+<pre>
+ llvm.part.set(0xFFFF, 0, 4, 7) -> 0xFF0F
+ llvm.part.set(0xFFFF, 0, 7, 4) -> 0x0060
+ llvm.part.set(0xFFFF, 0, 8, 3) -> 0x00F0
+ llvm.part.set(0xFFFF, 0, 3, 8) -> 0xFE07
+</pre>
</div>
<!-- ======================================================================= -->