<p>The value produced is <tt>op1</tt> * 2<sup><tt>op2</tt></sup> mod 2<sup>n</sup>,
where n is the width of the result. If <tt>op2</tt> is (statically or dynamically) negative or
-equal to or larger than the number of bits in <tt>op1</tt>, the result is undefined.</p>
+equal to or larger than the number of bits in <tt>op1</tt>, the result is undefined.
+If the arguments are vectors, each vector element of <tt>op1</tt> is shifted by the
+corresponding shift amount in <tt>op2</tt>.</p>
<h5>Example:</h5><pre>
<result> = shl i32 4, %var <i>; yields {i32}: 4 << %var</i>
<result> = shl i32 4, 2 <i>; yields {i32}: 16</i>
<result> = shl i32 1, 10 <i>; yields {i32}: 1024</i>
<result> = shl i32 1, 32 <i>; undefined</i>
+ <result> = shl <2 x i32> < i32 1, i32 1>, < i32 1, i32 2> <i>; yields: result=<2 x i32> < i32 2, i32 4></i>
</pre>
</div>
<!-- _______________________________________________________________________ -->
<p>This instruction always performs a logical shift right operation. The most
significant bits of the result will be filled with zero bits after the
shift. If <tt>op2</tt> is (statically or dynamically) equal to or larger than
-the number of bits in <tt>op1</tt>, the result is undefined.</p>
+the number of bits in <tt>op1</tt>, the result is undefined. If the arguments are
+vectors, each vector element of <tt>op1</tt> is shifted by the corresponding shift
+amount in <tt>op2</tt>.</p>
<h5>Example:</h5>
<pre>
<result> = lshr i8 4, 3 <i>; yields {i8}:result = 0</i>
<result> = lshr i8 -2, 1 <i>; yields {i8}:result = 0x7FFFFFFF </i>
<result> = lshr i32 1, 32 <i>; undefined</i>
+ <result> = lshr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 2> <i>; yields: result=<2 x i32> < i32 0x7FFFFFFF, i32 1></i>
</pre>
</div>
<p>This instruction always performs an arithmetic shift right operation,
The most significant bits of the result will be filled with the sign bit
of <tt>op1</tt>. If <tt>op2</tt> is (statically or dynamically) equal to or
-larger than the number of bits in <tt>op1</tt>, the result is undefined.
-</p>
+larger than the number of bits in <tt>op1</tt>, the result is undefined. If the
+arguments are vectors, each vector element of <tt>op1</tt> is shifted by the
+corresponding shift amount in <tt>op2</tt>.</p>
<h5>Example:</h5>
<pre>
<result> = ashr i8 4, 3 <i>; yields {i8}:result = 0</i>
<result> = ashr i8 -2, 1 <i>; yields {i8}:result = -1</i>
<result> = ashr i32 1, 32 <i>; undefined</i>
+ <result> = ashr <2 x i32> < i32 -2, i32 4>, < i32 1, i32 3> <i>; yields: result=<2 x i32> < i32 -1, i32 0></i>
</pre>
</div>
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<a href="mailto:sabre@nondot.org">Chris Lattner</a><br>
<a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>