<li><a href="#linkage">Linkage Types</a></li>
<li><a href="#callingconv">Calling Conventions</a></li>
<li><a href="#globalvars">Global Variables</a></li>
- <li><a href="#functionstructure">Function Structure</a></li>
+ <li><a href="#functionstructure">Functions</a></li>
+ <li><a href="#moduleasm">Module-Level Inline Assembly</a></li>
</ol>
</li>
<li><a href="#typesystem">Type System</a>
<ol>
- <li><a href="#t_primitive">Primitive Types</a>
+ <li><a href="#t_primitive">Primitive Types</a>
<ol>
<li><a href="#t_classifications">Type Classifications</a></li>
</ol>
<li><a href="#constantexprs">Constant Expressions</a>
</ol>
</li>
+ <li><a href="#othervalues">Other Values</a>
+ <ol>
+ <li><a href="#inlineasm">Inline Assembler Expressions</a>
+ </ol>
+ </li>
<li><a href="#instref">Instruction Reference</a>
<ol>
<li><a href="#terminators">Terminator Instructions</a>
<li><a href="#i_malloc">'<tt>malloc</tt>' Instruction</a></li>
<li><a href="#i_free">'<tt>free</tt>' Instruction</a></li>
<li><a href="#i_alloca">'<tt>alloca</tt>' Instruction</a></li>
- <li><a href="#i_load">'<tt>load</tt>' Instruction</a></li>
- <li><a href="#i_store">'<tt>store</tt>' Instruction</a></li>
- <li><a href="#i_getelementptr">'<tt>getelementptr</tt>' Instruction</a></li>
+ <li><a href="#i_load">'<tt>load</tt>' Instruction</a></li>
+ <li><a href="#i_store">'<tt>store</tt>' Instruction</a></li>
+ <li><a href="#i_getelementptr">'<tt>getelementptr</tt>' Instruction</a></li>
</ol>
</li>
<li><a href="#otherops">Other Operations</a>
<li><a href="#i_phi">'<tt>phi</tt>' Instruction</a></li>
<li><a href="#i_cast">'<tt>cast .. to</tt>' Instruction</a></li>
<li><a href="#i_select">'<tt>select</tt>' Instruction</a></li>
+ <li><a href="#i_vsetint">'<tt>vsetint</tt>' Instruction</a></li>
+ <li><a href="#i_vsetfp">'<tt>vsetfp</tt>' Instruction</a></li>
+ <li><a href="#i_vselect">'<tt>vselect</tt>' Instruction</a></li>
<li><a href="#i_extractelement">'<tt>extractelement</tt>' Instruction</a></li>
+ <li><a href="#i_insertelement">'<tt>insertelement</tt>' Instruction</a></li>
<li><a href="#i_call">'<tt>call</tt>' Instruction</a></li>
- <li><a href="#i_vaarg">'<tt>vaarg</tt>' Instruction</a></li>
+ <li><a href="#i_va_arg">'<tt>va_arg</tt>' Instruction</a></li>
</ol>
</li>
</ol>
<ol>
<li><a href="#i_returnaddress">'<tt>llvm.returnaddress</tt>' Intrinsic</a></li>
<li><a href="#i_frameaddress">'<tt>llvm.frameaddress</tt>' Intrinsic</a></li>
+ <li><a href="#i_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a></li>
+ <li><a href="#i_stackrestore">'<tt>llvm.stackrestore</tt>' Intrinsic</a></li>
<li><a href="#i_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a></li>
<li><a href="#i_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a></li>
<li><a href="#i_readcyclecounter"><tt>llvm.readcyclecounter</tt>' Intrinsic</a></li>
</ol>
</li>
- <li><a href="#int_os">Operating System Intrinsics</a>
- <ol>
- <li><a href="#i_readport">'<tt>llvm.readport</tt>' Intrinsic</a></li>
- <li><a href="#i_writeport">'<tt>llvm.writeport</tt>' Intrinsic</a></li>
- <li><a href="#i_readio">'<tt>llvm.readio</tt>' Intrinsic</a></li>
- <li><a href="#i_writeio">'<tt>llvm.writeio</tt>' Intrinsic</a></li>
- </ol>
<li><a href="#int_libc">Standard C Library Intrinsics</a>
<ol>
- <li><a href="#i_memcpy">'<tt>llvm.memcpy</tt>' Intrinsic</a></li>
- <li><a href="#i_memmove">'<tt>llvm.memmove</tt>' Intrinsic</a></li>
- <li><a href="#i_memset">'<tt>llvm.memset</tt>' Intrinsic</a></li>
- <li><a href="#i_isunordered">'<tt>llvm.isunordered</tt>' Intrinsic</a></li>
- <li><a href="#i_sqrt">'<tt>llvm.sqrt</tt>' Intrinsic</a></li>
+ <li><a href="#i_memcpy">'<tt>llvm.memcpy.*</tt>' Intrinsic</a></li>
+ <li><a href="#i_memmove">'<tt>llvm.memmove.*</tt>' Intrinsic</a></li>
+ <li><a href="#i_memset">'<tt>llvm.memset.*</tt>' Intrinsic</a></li>
+ <li><a href="#i_isunordered">'<tt>llvm.isunordered.*</tt>' Intrinsic</a></li>
+ <li><a href="#i_sqrt">'<tt>llvm.sqrt.*</tt>' Intrinsic</a></li>
</ol>
</li>
- <li><a href="#int_count">Bit counting Intrinsics</a>
+ <li><a href="#int_manip">Bit Manipulation Intrinsics</a>
<ol>
- <li><a href="#int_ctpop">'<tt>llvm.ctpop</tt>' Intrinsic </a></li>
- <li><a href="#int_ctlz">'<tt>llvm.ctlz</tt>' Intrinsic </a></li>
- <li><a href="#int_cttz">'<tt>llvm.cttz</tt>' Intrinsic </a></li>
+ <li><a href="#i_bswap">'<tt>llvm.bswap.*</tt>' Intrinsics</a></li>
+ <li><a href="#int_ctpop">'<tt>llvm.ctpop.*</tt>' Intrinsic </a></li>
+ <li><a href="#int_ctlz">'<tt>llvm.ctlz.*</tt>' Intrinsic </a></li>
+ <li><a href="#int_cttz">'<tt>llvm.cttz.*</tt>' Intrinsic </a></li>
</ol>
</li>
<li><a href="#int_debugger">Debugger intrinsics</a></li>
</div>
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+ <a name="moduleasm">Module-Level Inline Assembly</a></li>
+</div>
+
+<div class="doc_text">
+<p>
+Modules may contain "module-level inline asm" blocks, which corresponds to the
+GCC "file scope inline asm" blocks. These blocks are internally concatenated by
+LLVM and treated as a single unit, but may be separated in the .ll file if
+desired. The syntax is very simple:
+</p>
+
+<div class="doc_code"><pre>
+ module asm "inline asm code goes here"
+ module asm "more can go here"
+</pre></div>
+
+<p>The strings can contain any character by escaping non-printable characters.
+ The escape sequence used is simply "\xx" where "xx" is the two digit hex code
+ for the number.
+</p>
+
+<p>
+ The inline asm code is simply printed to the machine code .s file when
+ assembly code is generated.
+</p>
+</div>
<!-- *********************************************************************** -->
instruction, the index list may have zero or more indexes, which are required
to make sense for the type of "CSTPTR".</dd>
+ <dt><b><tt>select ( COND, VAL1, VAL2 )</tt></b></dt>
+
+ <dd>Perform the <a href="#i_select">select operation</a> on
+ constants.
+
+ <dt><b><tt>extractelement ( VAL, IDX )</tt></b></dt>
+
+ <dd>Perform the <a href="#i_extractelement">extractelement
+ operation</a> on constants.
+
+ <dt><b><tt>insertelement ( VAL, ELT, IDX )</tt></b></dt>
+
+ <dd>Perform the <a href="#i_insertelement">insertelement
+ operation</a> on constants.
+
<dt><b><tt>OPCODE ( LHS, RHS )</tt></b></dt>
<dd>Perform the specified operation of the LHS and RHS constants. OPCODE may
</dl>
</div>
+<!-- *********************************************************************** -->
+<div class="doc_section"> <a name="othervalues">Other Values</a> </div>
+<!-- *********************************************************************** -->
+
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+<a name="inlineasm">Inline Assembler Expressions</a>
+</div>
+
+<div class="doc_text">
+
+<p>
+LLVM supports inline assembler expressions (as opposed to <a href="#moduleasm">
+Module-Level Inline Assembly</a>) through the use of a special value. This
+value represents the inline assembler as a string (containing the instructions
+to emit), a list of operand constraints (stored as a string), and a flag that
+indicates whether or not the inline asm expression has side effects. An example
+inline assembler expression is:
+</p>
+
+<pre>
+ int(int) asm "bswap $0", "=r,r"
+</pre>
+
+<p>
+Inline assembler expressions may <b>only</b> be used as the callee operand of
+a <a href="#i_call"><tt>call</tt> instruction</a>. Thus, typically we have:
+</p>
+
+<pre>
+ %X = call int asm "<a href="#i_bswap">bswap</a> $0", "=r,r"(int %Y)
+</pre>
+
+<p>
+Inline asms with side effects not visible in the constraint list must be marked
+as having side effects. This is done through the use of the
+'<tt>sideeffect</tt>' keyword, like so:
+</p>
+
+<pre>
+ call void asm sideeffect "eieio", ""()
+</pre>
+
+<p>TODO: The format of the asm and constraints string still need to be
+documented here. Constraints on what can be done (e.g. duplication, moving, etc
+need to be documented).
+</p>
+
+</div>
+
<!-- *********************************************************************** -->
<div class="doc_section"> <a name="instref">Instruction Reference</a> </div>
<!-- *********************************************************************** -->
<h5>Example:</h5>
<pre> <result> = rem int 4, %var <i>; yields {int}:result = 4 % %var</i>
</pre>
+
</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection"> <a name="i_setcc">'<tt>set<i>cc</i></tt>'
<result> = setge sbyte 4, 5 <i>; yields {bool}:result = false</i>
</pre>
</div>
+
<!-- ======================================================================= -->
<div class="doc_subsection"> <a name="bitwiseops">Bitwise Binary
Operations</a> </div>
</pre>
</div>
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection"> <a name="i_vsetint">'<tt>vsetint</tt>'
+Instruction</a> </div>
+<div class="doc_text">
+<h5>Syntax:</h5>
+<pre><result> = vsetint <op>, <n x <ty>> <var1>, <var2> <i>; yields <n x bool></i>
+</pre>
+
+<h5>Overview:</h5>
+
+<p>The '<tt>vsetint</tt>' instruction takes two integer vectors and
+returns a vector of boolean values representing, at each position, the
+result of the comparison between the values at that position in the
+two operands.</p>
+
+<h5>Arguments:</h5>
+
+<p>The arguments to a '<tt>vsetint</tt>' instruction are a comparison
+operation and two value arguments. The value arguments must be of <a
+href="#t_integral">integral</a> <a href="#t_packed">packed</a> type,
+and they must have identical types. The operation argument must be
+one of <tt>eq</tt>, <tt>ne</tt>, <tt>slt</tt>, <tt>sgt</tt>,
+<tt>sle</tt>, <tt>sge</tt>, <tt>ult</tt>, <tt>ugt</tt>, <tt>ule</tt>,
+<tt>uge</tt>, <tt>true</tt>, and <tt>false</tt>. The result is a
+packed <tt>bool</tt> value with the same length as each operand.</p>
+
+<h5>Semantics:</h5>
+
+<p>The following table shows the semantics of '<tt>vsetint</tt>'. For
+each position of the result, the comparison is done on the
+corresponding positions of the two value arguments. Note that the
+signedness of the comparison depends on the comparison opcode and
+<i>not</i> on the signedness of the value operands. E.g., <tt>vsetint
+slt <4 x unsigned> %x, %y</tt> does an elementwise <i>signed</i>
+comparison of <tt>%x</tt> and <tt>%y</tt>.</p>
+
+<table border="1" cellspacing="0" cellpadding="4">
+ <tbody>
+ <tr><th>Operation</th><th>Result is true iff</th><th>Comparison is</th></tr>
+ <tr><td><tt>eq</tt></td><td>var1 == var2</td><td>--</td></tr>
+ <tr><td><tt>ne</tt></td><td>var1 != var2</td><td>--</td></tr>
+ <tr><td><tt>slt</tt></td><td>var1 < var2</td><td>signed</td></tr>
+ <tr><td><tt>sgt</tt></td><td>var1 > var2</td><td>signed</td></tr>
+ <tr><td><tt>sle</tt></td><td>var1 <= var2</td><td>signed</td></tr>
+ <tr><td><tt>sge</tt></td><td>var1 >= var2</td><td>signed</td></tr>
+ <tr><td><tt>ult</tt></td><td>var1 < var2</td><td>unsigned</td></tr>
+ <tr><td><tt>ugt</tt></td><td>var1 > var2</td><td>unsigned</td></tr>
+ <tr><td><tt>ule</tt></td><td>var1 <= var2</td><td>unsigned</td></tr>
+ <tr><td><tt>uge</tt></td><td>var1 >= var2</td><td>unsigned</td></tr>
+ <tr><td><tt>true</tt></td><td>always</td><td>--</td></tr>
+ <tr><td><tt>false</tt></td><td>never</td><td>--</td></tr>
+ </tbody>
+</table>
+
+<h5>Example:</h5>
+<pre> <result> = vsetint eq <2 x int> <int 0, int 1>, <int 1, int 0> <i>; yields {<2 x bool>}:result = false, false</i>
+ <result> = vsetint ne <2 x int> <int 0, int 1>, <int 1, int 0> <i>; yields {<2 x bool>}:result = true, true</i>
+ <result> = vsetint slt <2 x int> <int 0, int 1>, <int 1, int 0> <i>; yields {<2 x bool>}:result = true, false</i>
+ <result> = vsetint sgt <2 x int> <int 0, int 1>, <int 1, int 0> <i>; yields {<2 x bool>}:result = false, true</i>
+ <result> = vsetint sle <2 x int> <int 0, int 1>, <int 1, int 0> <i>; yields {<2 x bool>}:result = true, false</i>
+ <result> = vsetint sge <2 x int> <int 0, int 1>, <int 1, int 0> <i>; yields {<2 x bool>}:result = false, true</i>
+</pre>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection"> <a name="i_vsetfp">'<tt>vsetfp</tt>'
+Instruction</a> </div>
+<div class="doc_text">
+<h5>Syntax:</h5>
+<pre><result> = vsetfp <op>, <n x <ty>> <var1>, <var2> <i>; yields <n x bool></i>
+</pre>
+
+<h5>Overview:</h5>
+
+<p>The '<tt>vsetfp</tt>' instruction takes two floating point vector
+arguments and returns a vector of boolean values representing, at each
+position, the result of the comparison between the values at that
+position in the two operands.</p>
+
+<h5>Arguments:</h5>
+
+<p>The arguments to a '<tt>vsetfp</tt>' instruction are a comparison
+operation and two value arguments. The value arguments must be of <a
+href="t_floating">floating point</a> <a href="#t_packed">packed</a>
+type, and they must have identical types. The operation argument must
+be one of <tt>eq</tt>, <tt>ne</tt>, <tt>lt</tt>, <tt>gt</tt>,
+<tt>le</tt>, <tt>ge</tt>, <tt>oeq</tt>, <tt>one</tt>, <tt>olt</tt>,
+<tt>ogt</tt>, <tt>ole</tt>, <tt>oge</tt>, <tt>ueq</tt>, <tt>une</tt>,
+<tt>ult</tt>, <tt>ugt</tt>, <tt>ule</tt>, <tt>uge</tt>, <tt>o</tt>,
+<tt>u</tt>, <tt>true</tt>, and <tt>false</tt>. The result is a packed
+<tt>bool</tt> value with the same length as each operand.</p>
+
+<h5>Semantics:</h5>
+
+<p>The following table shows the semantics of '<tt>vsetfp</tt>' for
+floating point types. If either operand is a floating point Not a
+Number (NaN) value, the operation is unordered, and the value in the
+first column below is produced at that position. Otherwise, the
+operation is ordered, and the value in the second column is
+produced.</p>
+
+<table border="1" cellspacing="0" cellpadding="4">
+ <tbody>
+ <tr><th>Operation</th><th>If unordered<th>Otherwise true iff</th></tr>
+ <tr><td><tt>eq</tt></td><td>undefined</td><td>var1 == var2</td></tr>
+ <tr><td><tt>ne</tt></td><td>undefined</td><td>var1 != var2</td></tr>
+ <tr><td><tt>lt</tt></td><td>undefined</td><td>var1 < var2</td></tr>
+ <tr><td><tt>gt</tt></td><td>undefined</td><td>var1 > var2</td></tr>
+ <tr><td><tt>le</tt></td><td>undefined</td><td>var1 <= var2</td></tr>
+ <tr><td><tt>ge</tt></td><td>undefined</td><td>var1 >= var2</td></tr>
+ <tr><td><tt>oeq</tt></td><td>false</td><td>var1 == var2</td></tr>
+ <tr><td><tt>one</tt></td><td>false</td><td>var1 != var2</td></tr>
+ <tr><td><tt>olt</tt></td><td>false</td><td>var1 < var2</td></tr>
+ <tr><td><tt>ogt</tt></td><td>false</td><td>var1 > var2</td></tr>
+ <tr><td><tt>ole</tt></td><td>false</td><td>var1 <= var2</td></tr>
+ <tr><td><tt>oge</tt></td><td>false</td><td>var1 >= var2</td></tr>
+ <tr><td><tt>ueq</tt></td><td>true</td><td>var1 == var2</td></tr>
+ <tr><td><tt>une</tt></td><td>true</td><td>var1 != var2</td></tr>
+ <tr><td><tt>ult</tt></td><td>true</td><td>var1 < var2</td></tr>
+ <tr><td><tt>ugt</tt></td><td>true</td><td>var1 > var2</td></tr>
+ <tr><td><tt>ule</tt></td><td>true</td><td>var1 <= var2</td></tr>
+ <tr><td><tt>uge</tt></td><td>true</td><td>var1 >= var2</td></tr>
+ <tr><td><tt>o</tt></td><td>false</td><td>always</td></tr>
+ <tr><td><tt>u</tt></td><td>true</td><td>never</td></tr>
+ <tr><td><tt>true</tt></td><td>true</td><td>always</td></tr>
+ <tr><td><tt>false</tt></td><td>false</td><td>never</td></tr>
+ </tbody>
+</table>
+
+<h5>Example:</h5>
+<pre> <result> = vsetfp eq <2 x float> <float 0.0, float 1.0>, <float 1.0, float 0.0> <i>; yields {<2 x bool>}:result = false, false</i>
+ <result> = vsetfp ne <2 x float> <float 0.0, float 1.0>, <float 1.0, float 0.0> <i>; yields {<2 x bool>}:result = true, true</i>
+ <result> = vsetfp lt <2 x float> <float 0.0, float 1.0>, <float 1.0, float 0.0> <i>; yields {<2 x bool>}:result = true, false</i>
+ <result> = vsetfp gt <2 x float> <float 0.0, float 1.0>, <float 1.0, float 0.0> <i>; yields {<2 x bool>}:result = false, true</i>
+ <result> = vsetfp le <2 x float> <float 0.0, float 1.0>, <float 1.0, float 0.0> <i>; yields {<2 x bool>}:result = true, false</i>
+ <result> = vsetfp ge <2 x float> <float 0.0, float 1.0>, <float 1.0, float 0.0> <i>; yields {<2 x bool>}:result = false, true</i>
+</pre>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+ <a name="i_vselect">'<tt>vselect</tt>' Instruction</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+
+<pre>
+ <result> = vselect <n x bool> <cond>, <n x <ty>> <val1>, <n x <ty>> <val2> <i>; yields <n x <ty>></i>
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>vselect</tt>' instruction chooses one value at each position
+of a vector based on a condition.
+</p>
+
+
+<h5>Arguments:</h5>
+
+<p>
+The '<tt>vselect</tt>' instruction requires a <a
+href="#t_packed">packed</a> <tt>bool</tt> value indicating the
+condition at each vector position, and two values of the same packed
+type. All three operands must have the same length. The type of the
+result is the same as the type of the two value operands.</p>
+
+<h5>Semantics:</h5>
+
+<p>
+At each position where the <tt>bool</tt> vector is true, that position
+of the result gets its value from the first value argument; otherwise,
+it gets its value from the second value argument.
+</p>
+
+<h5>Example:</h5>
+
+<pre>
+ %X = vselect bool <2 x bool> <bool true, bool false>, <2 x ubyte> <ubyte 17, ubyte 17>,
+ <2 x ubyte> <ubyte 42, ubyte 42> <i>; yields <2 x ubyte>:17, 42</i>
+</pre>
+</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
<p>
The '<tt>extractelement</tt>' instruction extracts a single scalar
-element from a vector at a specified index.
+element from a packed vector at a specified index.
</p>
</div>
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+ <a name="i_insertelement">'<tt>insertelement</tt>' Instruction</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+
+<pre>
+ <result> = insertelement <n x <ty>> <val>, <ty> <elt>, uint <idx> <i>; yields <n x <ty>></i>
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>insertelement</tt>' instruction inserts a scalar
+element into a packed vector at a specified index.
+</p>
+
+
+<h5>Arguments:</h5>
+
+<p>
+The first operand of an '<tt>insertelement</tt>' instruction is a
+value of <a href="#t_packed">packed</a> type. The second operand is a
+scalar value whose type must equal the element type of the first
+operand. The third operand is an index indicating the position at
+which to insert the value. The index may be a variable.</p>
+
+<h5>Semantics:</h5>
+
+<p>
+The result is a packed vector of the same type as <tt>val</tt>. Its
+element values are those of <tt>val</tt> except at position
+<tt>idx</tt>, where it gets the value <tt>elt</tt>. If <tt>idx</tt>
+exceeds the length of <tt>val</tt>, the results are undefined.
+</p>
+
+<h5>Example:</h5>
+
+<pre>
+ %result = insertelement <4 x int> %vec, int 1, uint 0 <i>; yields <4 x int></i>
+</pre>
+</div>
+
+
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
<a name="i_call">'<tt>call</tt>' Instruction</a>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_vaarg">'<tt>vaarg</tt>' Instruction</a>
+ <a name="i_va_arg">'<tt>va_arg</tt>' Instruction</a>
</div>
<div class="doc_text">
<div class="doc_text">
<p>Variable argument support is defined in LLVM with the <a
- href="#i_vanext"><tt>vanext</tt></a> instruction and these three
+ href="#i_va_arg"><tt>va_arg</tt></a> instruction and these three
intrinsic functions. These functions are related to the similarly
named macros defined in the <tt><stdarg.h></tt> header file.</p>
<h5>Syntax:</h5>
<pre>
- declare sbyte* %llvm.gcread(sbyte** %Ptr)
+ declare sbyte* %llvm.gcread(sbyte* %ObjPtr, sbyte** %Ptr)
</pre>
<h5>Overview:</h5>
<h5>Arguments:</h5>
-<p>The argument is the address to read from, which should be an address
-allocated from the garbage collector.</p>
+<p>The second argument is the address to read from, which should be an address
+allocated from the garbage collector. The first object is a pointer to the
+start of the referenced object, if needed by the language runtime (otherwise
+null).</p>
<h5>Semantics:</h5>
<h5>Syntax:</h5>
<pre>
- declare void %llvm.gcwrite(sbyte* %P1, sbyte** %P2)
+ declare void %llvm.gcwrite(sbyte* %P1, sbyte* %Obj, sbyte** %P2)
</pre>
<h5>Overview:</h5>
<h5>Arguments:</h5>
-<p>The first argument is the reference to store, and the second is the heap
-location to store to.</p>
+<p>The first argument is the reference to store, the second is the start of the
+object to store it to, and the third is the address of the field of Obj to
+store to. If the runtime does not require a pointer to the object, Obj may be
+null.</p>
<h5>Semantics:</h5>
<h5>Syntax:</h5>
<pre>
- declare void* %llvm.returnaddress(uint <level>)
+ declare sbyte *%llvm.returnaddress(uint <level>)
</pre>
<h5>Overview:</h5>
<h5>Syntax:</h5>
<pre>
- declare void* %llvm.frameaddress(uint <level>)
+ declare sbyte *%llvm.frameaddress(uint <level>)
</pre>
<h5>Overview:</h5>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a>
+ <a name="i_stacksave">'<tt>llvm.stacksave</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare void %llvm.prefetch(sbyte * <address>,
- uint <rw>, uint <locality>)
+ declare sbyte *%llvm.stacksave()
</pre>
<h5>Overview:</h5>
-
<p>
-The '<tt>llvm.prefetch</tt>' intrinsic is a hint to the code generator to insert
-a prefetch instruction if supported; otherwise, it is a noop. Prefetches have
-no
-effect on the behavior of the program but can change its performance
-characteristics.
-</p>
-
-<h5>Arguments:</h5>
-
-<p>
-<tt>address</tt> is the address to be prefetched, <tt>rw</tt> is the specifier
-determining if the fetch should be for a read (0) or write (1), and
-<tt>locality</tt> is a temporal locality specifier ranging from (0) - no
-locality, to (3) - extremely local keep in cache. The <tt>rw</tt> and
-<tt>locality</tt> arguments must be constant integers.
+The '<tt>llvm.stacksave</tt>' intrinsic is used to remember the current state of
+the function stack, for use with <a href="#i_stackrestore">
+<tt>llvm.stackrestore</tt></a>. This is useful for implementing language
+features like scoped automatic variable sized arrays in C99.
</p>
<h5>Semantics:</h5>
<p>
-This intrinsic does not modify the behavior of the program. In particular,
-prefetches cannot trap and do not produce a value. On targets that support this
-intrinsic, the prefetch can provide hints to the processor cache for better
-performance.
+This intrinsic returns a opaque pointer value that can be passed to <a
+href="#i_stackrestore"><tt>llvm.stackrestore</tt></a>. When an
+<tt>llvm.stackrestore</tt> intrinsic is executed with a value saved from
+<tt>llvm.stacksave</tt>, it effectively restores the state of the stack to the
+state it was in when the <tt>llvm.stacksave</tt> intrinsic executed. In
+practice, this pops any <a href="#i_alloca">alloca</a> blocks from the stack
+that were allocated after the <tt>llvm.stacksave</tt> was executed.
</p>
</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a>
+ <a name="i_stackrestore">'<tt>llvm.stackrestore</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare void %llvm.pcmarker( uint <id> )
+ declare void %llvm.stackrestore(sbyte* %ptr)
</pre>
<h5>Overview:</h5>
-
<p>
-The '<tt>llvm.pcmarker</tt>' intrinsic is a method to export a Program Counter
-(PC) in a region of
-code to simulators and other tools. The method is target specific, but it is
-expected that the marker will use exported symbols to transmit the PC of the marker.
-The marker makes no guarantees that it will remain with any specific instruction
-after optimizations. It is possible that the presence of a marker will inhibit
-optimizations. The intended use is to be inserted after optmizations to allow
-correlations of simulation runs.
-</p>
-
-<h5>Arguments:</h5>
-
-<p>
-<tt>id</tt> is a numerical id identifying the marker.
+The '<tt>llvm.stackrestore</tt>' intrinsic is used to restore the state of
+the function stack to the state it was in when the corresponding <a
+href="#llvm.stacksave"><tt>llvm.stacksave</tt></a> intrinsic executed. This is
+useful for implementing language features like scoped automatic variable sized
+arrays in C99.
</p>
<h5>Semantics:</h5>
<p>
-This intrinsic does not modify the behavior of the program. Backends that do not
-support this intrinisic may ignore it.
+See the description for <a href="#i_stacksave"><tt>llvm.stacksave</tt></a>.
</p>
</div>
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="i_readcyclecounter">'<tt>llvm.readcyclecounter</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<pre>
- declare ulong %llvm.readcyclecounter( )
-</pre>
-
-<h5>Overview:</h5>
-
-
-<p>
-The '<tt>llvm.readcyclecounter</tt>' intrinsic provides access to the cycle
-counter register (or similar low latency, high accuracy clocks) on those targets
-that support it. On X86, it should map to RDTSC. On Alpha, it should map to RPCC.
-As the backing counters overflow quickly (on the order of 9 seconds on alpha), this
-should only be used for small timings.
-</p>
-
-<h5>Semantics:</h5>
-
-<p>
-When directly supported, reading the cycle counter should not modify any memory.
-Implementations are allowed to either return a application specific value or a
-system wide value. On backends without support, this is lowered to a constant 0.
-</p>
-
-</div>
-
-
-<!-- ======================================================================= -->
-<div class="doc_subsection">
- <a name="int_os">Operating System Intrinsics</a>
-</div>
-
-<div class="doc_text">
-<p>
-These intrinsics are provided by LLVM to support the implementation of
-operating system level code.
-</p>
-
-</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_readport">'<tt>llvm.readport</tt>' Intrinsic</a>
+ <a name="i_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare <integer type> %llvm.readport (<integer type> <address>)
+ declare void %llvm.prefetch(sbyte * <address>,
+ uint <rw>, uint <locality>)
</pre>
<h5>Overview:</h5>
-<p>
-The '<tt>llvm.readport</tt>' intrinsic reads data from the specified hardware
-I/O port.
-</p>
-
-<h5>Arguments:</h5>
-
-<p>
-The argument to this intrinsic indicates the hardware I/O address from which
-to read the data. The address is in the hardware I/O address namespace (as
-opposed to being a memory location for memory mapped I/O).
-</p>
-
-<h5>Semantics:</h5>
-
-<p>
-The '<tt>llvm.readport</tt>' intrinsic reads data from the hardware I/O port
-specified by <i>address</i> and returns the value. The address and return
-value must be integers, but the size is dependent upon the platform upon which
-the program is code generated. For example, on x86, the address must be an
-unsigned 16-bit value, and the return value must be 8, 16, or 32 bits.
-</p>
-
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="i_writeport">'<tt>llvm.writeport</tt>' Intrinsic</a>
-</div>
-
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<pre>
- call void (<integer type>, <integer type>)*
- %llvm.writeport (<integer type> <value>,
- <integer type> <address>)
-</pre>
-
-<h5>Overview:</h5>
<p>
-The '<tt>llvm.writeport</tt>' intrinsic writes data to the specified hardware
-I/O port.
+The '<tt>llvm.prefetch</tt>' intrinsic is a hint to the code generator to insert
+a prefetch instruction if supported; otherwise, it is a noop. Prefetches have
+no
+effect on the behavior of the program but can change its performance
+characteristics.
</p>
<h5>Arguments:</h5>
<p>
-The first argument is the value to write to the I/O port.
-</p>
-
-<p>
-The second argument indicates the hardware I/O address to which data should be
-written. The address is in the hardware I/O address namespace (as opposed to
-being a memory location for memory mapped I/O).
+<tt>address</tt> is the address to be prefetched, <tt>rw</tt> is the specifier
+determining if the fetch should be for a read (0) or write (1), and
+<tt>locality</tt> is a temporal locality specifier ranging from (0) - no
+locality, to (3) - extremely local keep in cache. The <tt>rw</tt> and
+<tt>locality</tt> arguments must be constant integers.
</p>
<h5>Semantics:</h5>
<p>
-The '<tt>llvm.writeport</tt>' intrinsic writes <i>value</i> to the I/O port
-specified by <i>address</i>. The address and value must be integers, but the
-size is dependent upon the platform upon which the program is code generated.
-For example, on x86, the address must be an unsigned 16-bit value, and the
-value written must be 8, 16, or 32 bits in length.
+This intrinsic does not modify the behavior of the program. In particular,
+prefetches cannot trap and do not produce a value. On targets that support this
+intrinsic, the prefetch can provide hints to the processor cache for better
+performance.
</p>
</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_readio">'<tt>llvm.readio</tt>' Intrinsic</a>
+ <a name="i_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare <result> %llvm.readio (<ty> * <pointer>)
+ declare void %llvm.pcmarker( uint <id> )
</pre>
<h5>Overview:</h5>
+
<p>
-The '<tt>llvm.readio</tt>' intrinsic reads data from a memory mapped I/O
-address.
+The '<tt>llvm.pcmarker</tt>' intrinsic is a method to export a Program Counter
+(PC) in a region of
+code to simulators and other tools. The method is target specific, but it is
+expected that the marker will use exported symbols to transmit the PC of the marker.
+The marker makes no guarantees that it will remain with any specific instruction
+after optimizations. It is possible that the presence of a marker will inhibit
+optimizations. The intended use is to be inserted after optimizations to allow
+correlations of simulation runs.
</p>
<h5>Arguments:</h5>
<p>
-The argument to this intrinsic is a pointer indicating the memory address from
-which to read the data. The data must be a
-<a href="#t_firstclass">first class</a> type.
+<tt>id</tt> is a numerical id identifying the marker.
</p>
<h5>Semantics:</h5>
<p>
-The '<tt>llvm.readio</tt>' intrinsic reads data from a memory mapped I/O
-location specified by <i>pointer</i> and returns the value. The argument must
-be a pointer, and the return value must be a
-<a href="#t_firstclass">first class</a> type. However, certain architectures
-may not support I/O on all first class types. For example, 32-bit processors
-may only support I/O on data types that are 32 bits or less.
-</p>
-
-<p>
-This intrinsic enforces an in-order memory model for llvm.readio and
-llvm.writeio calls on machines that use dynamic scheduling. Dynamically
-scheduled processors may execute loads and stores out of order, re-ordering at
-run time accesses to memory mapped I/O registers. Using these intrinsics
-ensures that accesses to memory mapped I/O registers occur in program order.
+This intrinsic does not modify the behavior of the program. Backends that do not
+support this intrinisic may ignore it.
</p>
</div>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_writeio">'<tt>llvm.writeio</tt>' Intrinsic</a>
+ <a name="i_readcyclecounter">'<tt>llvm.readcyclecounter</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare void %llvm.writeio (<ty1> <value>, <ty2> * <pointer>)
+ declare ulong %llvm.readcyclecounter( )
</pre>
<h5>Overview:</h5>
-<p>
-The '<tt>llvm.writeio</tt>' intrinsic writes data to the specified memory
-mapped I/O address.
-</p>
-
-<h5>Arguments:</h5>
<p>
-The first argument is the value to write to the memory mapped I/O location.
-The second argument is a pointer indicating the memory address to which the
-data should be written.
+The '<tt>llvm.readcyclecounter</tt>' intrinsic provides access to the cycle
+counter register (or similar low latency, high accuracy clocks) on those targets
+that support it. On X86, it should map to RDTSC. On Alpha, it should map to RPCC.
+As the backing counters overflow quickly (on the order of 9 seconds on alpha), this
+should only be used for small timings.
</p>
<h5>Semantics:</h5>
<p>
-The '<tt>llvm.writeio</tt>' intrinsic writes <i>value</i> to the memory mapped
-I/O address specified by <i>pointer</i>. The value must be a
-<a href="#t_firstclass">first class</a> type. However, certain architectures
-may not support I/O on all first class types. For example, 32-bit processors
-may only support I/O on data types that are 32 bits or less.
-</p>
-
-<p>
-This intrinsic enforces an in-order memory model for llvm.readio and
-llvm.writeio calls on machines that use dynamic scheduling. Dynamically
-scheduled processors may execute loads and stores out of order, re-ordering at
-run time accesses to memory mapped I/O registers. Using these intrinsics
-ensures that accesses to memory mapped I/O registers occur in program order.
+When directly supported, reading the cycle counter should not modify any memory.
+Implementations are allowed to either return a application specific value or a
+system wide value. On backends without support, this is lowered to a constant 0.
</p>
</div>
<h5>Syntax:</h5>
<pre>
- declare void %llvm.memcpy(sbyte* <dest>, sbyte* <src>,
- uint <len>, uint <align>)
+ declare void %llvm.memcpy.i32(sbyte* <dest>, sbyte* <src>,
+ uint <len>, uint <align>)
+ declare void %llvm.memcpy.i64(sbyte* <dest>, sbyte* <src>,
+ ulong <len>, uint <align>)
</pre>
<h5>Overview:</h5>
<p>
-The '<tt>llvm.memcpy</tt>' intrinsic copies a block of memory from the source
+The '<tt>llvm.memcpy.*</tt>' intrinsics copy a block of memory from the source
location to the destination location.
</p>
<p>
-Note that, unlike the standard libc function, the <tt>llvm.memcpy</tt> intrinsic
-does not return a value, and takes an extra alignment argument.
+Note that, unlike the standard libc function, the <tt>llvm.memcpy.*</tt>
+intrinsics do not return a value, and takes an extra alignment argument.
</p>
<h5>Arguments:</h5>
<p>
The first argument is a pointer to the destination, the second is a pointer to
-the source. The third argument is an (arbitrarily sized) integer argument
+the source. The third argument is an integer argument
specifying the number of bytes to copy, and the fourth argument is the alignment
of the source and destination locations.
</p>
<p>
If the call to this intrinisic has an alignment value that is not 0 or 1, then
-the caller guarantees that the size of the copy is a multiple of the alignment
-and that both the source and destination pointers are aligned to that boundary.
+the caller guarantees that both the source and destination pointers are aligned
+to that boundary.
</p>
<h5>Semantics:</h5>
<p>
-The '<tt>llvm.memcpy</tt>' intrinsic copies a block of memory from the source
+The '<tt>llvm.memcpy.*</tt>' intrinsics copy a block of memory from the source
location to the destination location, which are not allowed to overlap. It
copies "len" bytes of memory over. If the argument is known to be aligned to
some boundary, this can be specified as the fourth argument, otherwise it should
<h5>Syntax:</h5>
<pre>
- declare void %llvm.memmove(sbyte* <dest>, sbyte* <src>,
- uint <len>, uint <align>)
+ declare void %llvm.memmove.i32(sbyte* <dest>, sbyte* <src>,
+ uint <len>, uint <align>)
+ declare void %llvm.memmove.i64(sbyte* <dest>, sbyte* <src>,
+ ulong <len>, uint <align>)
</pre>
<h5>Overview:</h5>
<p>
-The '<tt>llvm.memmove</tt>' intrinsic moves a block of memory from the source
-location to the destination location. It is similar to the '<tt>llvm.memcpy</tt>'
-intrinsic but allows the two memory locations to overlap.
+The '<tt>llvm.memmove.*</tt>' intrinsics move a block of memory from the source
+location to the destination location. It is similar to the
+'<tt>llvm.memcmp</tt>' intrinsic but allows the two memory locations to overlap.
</p>
<p>
-Note that, unlike the standard libc function, the <tt>llvm.memmove</tt> intrinsic
-does not return a value, and takes an extra alignment argument.
+Note that, unlike the standard libc function, the <tt>llvm.memmove.*</tt>
+intrinsics do not return a value, and takes an extra alignment argument.
</p>
<h5>Arguments:</h5>
<p>
The first argument is a pointer to the destination, the second is a pointer to
-the source. The third argument is an (arbitrarily sized) integer argument
+the source. The third argument is an integer argument
specifying the number of bytes to copy, and the fourth argument is the alignment
of the source and destination locations.
</p>
<p>
If the call to this intrinisic has an alignment value that is not 0 or 1, then
-the caller guarantees that the size of the copy is a multiple of the alignment
-and that both the source and destination pointers are aligned to that boundary.
+the caller guarantees that the source and destination pointers are aligned to
+that boundary.
</p>
<h5>Semantics:</h5>
<p>
-The '<tt>llvm.memmove</tt>' intrinsic copies a block of memory from the source
+The '<tt>llvm.memmove.*</tt>' intrinsics copy a block of memory from the source
location to the destination location, which may overlap. It
copies "len" bytes of memory over. If the argument is known to be aligned to
some boundary, this can be specified as the fourth argument, otherwise it should
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_memset">'<tt>llvm.memset</tt>' Intrinsic</a>
+ <a name="i_memset">'<tt>llvm.memset.*</tt>' Intrinsics</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare void %llvm.memset(sbyte* <dest>, ubyte <val>,
- uint <len>, uint <align>)
+ declare void %llvm.memset.i32(sbyte* <dest>, ubyte <val>,
+ uint <len>, uint <align>)
+ declare void %llvm.memset.i64(sbyte* <dest>, ubyte <val>,
+ ulong <len>, uint <align>)
</pre>
<h5>Overview:</h5>
<p>
-The '<tt>llvm.memset</tt>' intrinsic fills a block of memory with a particular
+The '<tt>llvm.memset.*</tt>' intrinsics fill a block of memory with a particular
byte value.
</p>
<p>
The first argument is a pointer to the destination to fill, the second is the
-byte value to fill it with, the third argument is an (arbitrarily sized) integer
+byte value to fill it with, the third argument is an integer
argument specifying the number of bytes to fill, and the fourth argument is the
known alignment of destination location.
</p>
<p>
If the call to this intrinisic has an alignment value that is not 0 or 1, then
-the caller guarantees that the size of the copy is a multiple of the alignment
-and that the destination pointer is aligned to that boundary.
+the caller guarantees that the destination pointer is aligned to that boundary.
</p>
<h5>Semantics:</h5>
<p>
-The '<tt>llvm.memset</tt>' intrinsic fills "len" bytes of memory starting at the
+The '<tt>llvm.memset.*</tt>' intrinsics fill "len" bytes of memory starting at
+the
destination location. If the argument is known to be aligned to some boundary,
this can be specified as the fourth argument, otherwise it should be set to 0 or
1.
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_isunordered">'<tt>llvm.isunordered</tt>' Intrinsic</a>
+ <a name="i_isunordered">'<tt>llvm.isunordered.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare bool %llvm.isunordered(<float or double> Val1, <float or double> Val2)
+ declare bool %llvm.isunordered.f32(float Val1, float Val2)
+ declare bool %llvm.isunordered.f64(double Val1, double Val2)
</pre>
<h5>Overview:</h5>
<p>
-The '<tt>llvm.isunordered</tt>' intrinsic returns true if either or both of the
+The '<tt>llvm.isunordered</tt>' intrinsics return true if either or both of the
specified floating point values is a NAN.
</p>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_sqrt">'<tt>llvm.sqrt</tt>' Intrinsic</a>
+ <a name="i_sqrt">'<tt>llvm.sqrt.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare <float or double> %llvm.sqrt(<float or double> Val)
+ declare double %llvm.sqrt.f32(float Val)
+ declare double %llvm.sqrt.f64(double Val)
</pre>
<h5>Overview:</h5>
<p>
-The '<tt>llvm.sqrt</tt>' intrinsic returns the sqrt of the specified operand,
+The '<tt>llvm.sqrt</tt>' intrinsics return the sqrt of the specified operand,
returning the same value as the libm '<tt>sqrt</tt>' function would. Unlike
<tt>sqrt</tt> in libm, however, <tt>llvm.sqrt</tt> has undefined behavior for
negative numbers (which allows for better optimization).
<!-- ======================================================================= -->
<div class="doc_subsection">
- <a name="int_count">Bit Counting Intrinsics</a>
+ <a name="int_manip">Bit Manipulation Intrinsics</a>
</div>
<div class="doc_text">
<p>
-LLVM provides intrinsics for a few important bit counting operations.
+LLVM provides intrinsics for a few important bit manipulation operations.
These allow efficient code generation for some algorithms.
</p>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="int_ctpop">'<tt>llvm.ctpop</tt>' Intrinsic</a>
+ <a name="i_bswap">'<tt>llvm.bswap.*</tt>' Intrinsics</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare int %llvm.ctpop(int <src>)
+ declare ushort %llvm.bswap.i16(ushort <id>)
+ declare uint %llvm.bswap.i32(uint <id>)
+ declare ulong %llvm.bswap.i64(ulong <id>)
+</pre>
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.bwsap</tt>' family of intrinsics is used to byteswap a 16, 32 or
+64 bit quantity. These are useful for performing operations on data that is not
+in the target's native byte order.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+The <tt>llvm.bswap.16</tt> intrinsic returns a ushort value that has the high and low
+byte of the input ushort swapped. Similarly, the <tt>llvm.bswap.i32</tt> intrinsic
+returns a uint value that has the four bytes of the input uint swapped, so that
+if the input bytes are numbered 0, 1, 2, 3 then the returned uint will have its
+bytes in 3, 2, 1, 0 order. The <tt>llvm.bswap.i64</tt> intrinsic extends this concept
+to 64 bits.
+</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+ <a name="int_ctpop">'<tt>llvm.ctpop.*</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+ declare ubyte %llvm.ctpop.i8 (ubyte <src>)
+ declare ushort %llvm.ctpop.i16(ushort <src>)
+ declare uint %llvm.ctpop.i32(uint <src>)
+ declare ulong %llvm.ctpop.i64(ulong <src>)
</pre>
<h5>Overview:</h5>
<p>
-The '<tt>llvm.ctpop</tt>' intrinsic counts the number of ones in a variable.
+The '<tt>llvm.ctpop</tt>' family of intrinsics counts the number of bits set in a
+value.
</p>
<h5>Arguments:</h5>
<p>
The only argument is the value to be counted. The argument may be of any
-integer type. The return type must match the argument type.
+unsigned integer type. The return type must match the argument type.
</p>
<h5>Semantics:</h5>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="int_ctlz">'<tt>llvm.ctlz</tt>' Intrinsic</a>
+ <a name="int_ctlz">'<tt>llvm.ctlz.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare int %llvm.ctlz(int <src>)
-
+ declare ubyte %llvm.ctlz.i8 (ubyte <src>)
+ declare ushort %llvm.ctlz.i16(ushort <src>)
+ declare uint %llvm.ctlz.i32(uint <src>)
+ declare ulong %llvm.ctlz.i64(ulong <src>)
</pre>
<h5>Overview:</h5>
<p>
-The '<tt>llvm.ctlz</tt>' intrinsic counts the number of leading zeros in a
-variable.
+The '<tt>llvm.ctlz</tt>' family of intrinsic functions counts the number of
+leading zeros in a variable.
</p>
<h5>Arguments:</h5>
<p>
The only argument is the value to be counted. The argument may be of any
-integer type. The return type must match the argument type.
+unsigned integer type. The return type must match the argument type.
</p>
<h5>Semantics:</h5>
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="int_cttz">'<tt>llvm.cttz</tt>' Intrinsic</a>
+ <a name="int_cttz">'<tt>llvm.cttz.*</tt>' Intrinsic</a>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- declare int %llvm.cttz(int <src>)
-
+ declare ubyte %llvm.cttz.i8 (ubyte <src>)
+ declare ushort %llvm.cttz.i16(ushort <src>)
+ declare uint %llvm.cttz.i32(uint <src>)
+ declare ulong %llvm.cttz.i64(ulong <src>)
</pre>
<h5>Overview:</h5>
<p>
-The '<tt>llvm.cttz</tt>' intrinsic counts the number of trailing zeros.
+The '<tt>llvm.cttz</tt>' family of intrinsic functions counts the number of
+trailing zeros.
</p>
<h5>Arguments:</h5>
<p>
The only argument is the value to be counted. The argument may be of any
-integer type. The return type must match the argument type.
+unsigned integer type. The return type must match the argument type.
</p>
<h5>Semantics:</h5>
src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
<a href="mailto:sabre@nondot.org">Chris Lattner</a><br>
- <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br>
+ <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
Last modified: $Date$
</address>
</body>