<li><a href="#functionstructure">Functions</a></li>
<li><a href="#aliasstructure">Aliases</a>
<li><a href="#paramattrs">Parameter Attributes</a></li>
+ <li><a href="#fnattrs">Function Attributes</a></li>
<li><a href="#gc">Garbage Collector Names</a></li>
<li><a href="#moduleasm">Module-Level Inline Assembly</a></li>
<li><a href="#datalayout">Data Layout</a></li>
<div class="doc_text">
<p>This document is a reference manual for the LLVM assembly language.
-LLVM is an SSA based representation that provides type safety,
-low-level operations, flexibility, and the capability of representing
-'all' high-level languages cleanly. It is the common code
+LLVM is a Static Single Assignment (SSA) based representation that provides
+type safety, low-level operations, flexibility, and the capability of
+representing 'all' high-level languages cleanly. It is the common code
representation used throughout all phases of the LLVM compilation
strategy.</p>
</div>
</dd>
<dt><tt><b><a name="linkage_externweak">extern_weak</a></b></tt>: </dt>
- <dd>The semantics of this linkage follow the ELF model: the symbol is weak
- until linked, if not linked, the symbol becomes null instead of being an
- undefined reference.
+ <dd>The semantics of this linkage follow the ELF object file model: the
+ symbol is weak until linked, if not linked, the symbol becomes null instead
+ of being an undefined reference.
</dd>
<dt><tt><b><a name="linkage_external">externally visible</a></b></tt>:</dt>
<p>
The next two types of linkage are targeted for Microsoft Windows platform
only. They are designed to support importing (exporting) symbols from (to)
- DLLs.
+ DLLs (Dynamic Link Libraries).
</p>
<dl>
<dd>This calling convention attempts to make calls as fast as possible
(e.g. by passing things in registers). This calling convention allows the
target to use whatever tricks it wants to produce fast code for the target,
- without having to conform to an externally specified ABI. Implementations of
- this convention should allow arbitrary
+ without having to conform to an externally specified ABI (Application Binary
+ Interface). Implementations of this convention should allow arbitrary
<a href="CodeGenerator.html#tailcallopt">tail call optimization</a> to be
supported. This calling convention does not support varargs and requires the
prototype of all callees to exactly match the prototype of the function
<dl>
<dt><b>"<tt>default</tt>" - Default style</b>:</dt>
- <dd>On ELF, default visibility means that the declaration is visible to other
+ <dd>On targets that use the ELF object file format, default visibility means
+ that the declaration is visible to other
modules and, in shared libraries, means that the declared entity may be
overridden. On Darwin, default visibility means that the declaration is
visible to other modules. Default visibility corresponds to "external
<a href="#paramattrs">parameter attribute</a> for the return type, a function
name, a (possibly empty) argument list (each with optional
<a href="#paramattrs">parameter attributes</a>), an optional section, an
-optional alignment, an optional <a href="#gc">garbage collector name</a>, an
+optional alignment, an optional <a href="#gc">garbage collector name</a>,
+an optional <a href="#notes">function notes</a>, an
opening curly brace, a list of basic blocks, and a closing curly brace.
LLVM function declarations consist of the "<tt>declare</tt>" keyword, an
name, a possibly empty list of arguments, an optional alignment, and an optional
<a href="#gc">garbage collector name</a>.</p>
-<p>A function definition contains a list of basic blocks, forming the CFG for
+<p>A function definition contains a list of basic blocks, forming the CFG
+(Control Flow Graph) for
the function. Each basic block may optionally start with a label (giving the
basic block a symbol table entry), contains a list of instructions, and ends
with a <a href="#terminators">terminator</a> instruction (such as a branch or
<div class="doc_code">
<pre>
-@<Name> = [Linkage] [Visibility] alias <AliaseeTy> @<Aliasee>
+@<Name> = alias [Linkage] [Visibility] <AliaseeTy> @<Aliasee>
</pre>
</div>
<div class="doc_code">
<pre>
-declare i32 @printf(i8* noalias , ...) nounwind
-declare i32 @atoi(i8*) nounwind readonly
+declare i32 @printf(i8* noalias , ...)
+declare i32 @atoi(i8 zeroext*)
</pre>
</div>
a call to this function.</dd>
<dt><tt>inreg</tt></dt>
- <dd>This indicates that the parameter should be placed in register (if
- possible) during assembling function call. Support for this attribute is
- target-specific</dd>
+ <dd>This indicates that this parameter or return value should be treated
+ in a special target-dependent fashion during while emitting code for a
+ function call or return (usually, by putting it in a register as opposed
+ to memory; in some places it is used to distinguish between two different
+ kinds of registers). Use of this attribute is target-specific</dd>
<dt><tt>byval</tt></dt>
<dd>This indicates that the pointer parameter should really be passed by
value to the function. The attribute implies that a hidden copy of the
pointee is made between the caller and the callee, so the callee is unable
- to modify the value in the callee. This attribute is only valid on llvm
+ to modify the value in the callee. This attribute is only valid on LLVM
pointer arguments. It is generally used to pass structs and arrays by
value, but is also valid on scalars (even though this is silly).</dd>
parameter. The caller is responsible for ensuring that this is the case,
usually by placing the value in a stack allocation.</dd>
- <dt><tt>noreturn</tt></dt>
- <dd>This function attribute indicates that the function never returns. This
- indicates to LLVM that every call to this function should be treated as if
- an <tt>unreachable</tt> instruction immediately followed the call.</dd>
-
- <dt><tt>nounwind</tt></dt>
- <dd>This function attribute indicates that no exceptions unwind out of the
- function. Usually this is because the function makes no use of exceptions,
- but it may also be that the function catches any exceptions thrown when
- executing it.</dd>
-
<dt><tt>nest</tt></dt>
<dd>This indicates that the pointer parameter can be excised using the
<a href="#int_trampoline">trampoline intrinsics</a>.</dd>
- <dt><tt>readonly</tt></dt>
- <dd>This function attribute indicates that the function has no side-effects
- except for producing a return value or throwing an exception. The value
- returned must only depend on the function arguments and/or global variables.
- It may use values obtained by dereferencing pointers.</dd>
- <dt><tt>readnone</tt></dt>
- <dd>A <tt>readnone</tt> function has the same restrictions as a <tt>readonly</tt>
- function, but in addition it is not allowed to dereference any pointer arguments
- or global variables.
</dl>
</div>
the named garbage collection algorithm.</p>
</div>
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+ <a name="fnattrs">Function Attributes</a>
+</div>
+
+<div class="doc_text">
+
+<p>Function attributes are set to communicate additional information about
+ a function. Function attributes are considered to be part of the function,
+ not of the function type, so functions with different parameter attributes
+ can have the same function type.</p>
+
+ <p>Function attributes are simple keywords that follow the type specified. If
+ multiple attributes are needed, they are space separated. For
+ example:</p>
+
+<div class="doc_code">
+<pre>
+define void @f() noinline { ... }
+define void @f() alwaysinline { ... }
+define void @f() alwaysinline optsize { ... }
+define void @f() optsize
+</pre>
+</div>
+
+<dl>
+<dt><tt>alwaysinline</tt></dt>
+<dd>This attribute requests inliner to inline this function irrespective of
+inlining size threshold for this function.</dd>
+
+<dt><tt>noinline</tt></dt>
+<dd>This attributes requests inliner to never inline this function in any
+situation. This attribute may not be used together with <tt>alwaysinline</tt>
+ attribute.</dd>
+
+<dt><tt>optsize</tt></dt>
+<dd>This attribute suggests that optimization passes and code generator passes
+make choices that help reduce code size.</dd>
+
+<dt><tt>noreturn</tt></dt>
+<dd>This function attribute indicates that the function never returns. This
+ tells LLVM that every call to this function should be treated as if
+ an <tt>unreachable</tt> instruction immediately followed the call.</dd>
+
+<dt><tt>nounwind</tt></dt>
+<dd>This function attribute indicates that no exceptions unwind out of the
+ function. Usually this is because the function makes no use of exceptions,
+ but it may also be that the function catches any exceptions thrown when
+ executing it.</dd>
+
+<dt><tt>readonly</tt></dt>
+<dd>This function attribute indicates that the function has no side-effects
+ except for producing a return value or throwing an exception. The value
+ returned must only depend on the function arguments and/or global variables.
+ It may use values obtained by dereferencing pointers.</dd>
+<dt><tt>readnone</tt></dt>
+<dd>A <tt>readnone</tt> function has the same restrictions as a <tt>readonly</tt>
+ function, but in addition it is not allowed to dereference any pointer arguments
+ or global variables.
+</dl>
+
+</div>
+
<!-- ======================================================================= -->
<div class="doc_subsection">
<a name="moduleasm">Module-Level Inline Assembly</a>
<dd>Specifies that the target lays out data in big-endian form. That is, the
bits with the most significance have the lowest address location.</dd>
<dt><tt>e</tt></dt>
- <dd>Specifies that hte target lays out data in little-endian form. That is,
+ <dd>Specifies that the target lays out data in little-endian form. That is,
the bits with the least significance have the lowest address location.</dd>
<dt><tt>p:<i>size</i>:<i>abi</i>:<i>pref</i></tt></dt>
<dd>This specifies the <i>size</i> of a pointer and its <i>abi</i> and
<li><tt>i8:8:8</tt> - i8 is 8-bit (byte) aligned</li>
<li><tt>i16:16:16</tt> - i16 is 16-bit aligned</li>
<li><tt>i32:32:32</tt> - i32 is 32-bit aligned</li>
- <li><tt>i64:32:64</tt> - i64 has abi alignment of 32-bits but preferred
+ <li><tt>i64:32:64</tt> - i64 has ABI alignment of 32-bits but preferred
alignment of 64-bits</li>
<li><tt>f32:32:32</tt> - float is 32-bit aligned</li>
<li><tt>f64:64:64</tt> - double is 64-bit aligned</li>
<li><tt>v128:128:128</tt> - 128-bit vector is 128-bit aligned</li>
<li><tt>a0:0:1</tt> - aggregates are 8-bit aligned</li>
</ul>
-<p>When llvm is determining the alignment for a given type, it uses the
+<p>When LLVM is determining the alignment for a given type, it uses the
following rules:
<ol>
<li>If the type sought is an exact match for one of the specifications, that
<p>The LLVM type system is one of the most important features of the
intermediate representation. Being typed enables a number of
-optimizations to be performed on the IR directly, without having to do
+optimizations to be performed on the intermediate representation directly,
+without having to do
extra analyses on the side before the transformation. A strong type
system makes it easier to read the generated code and enables novel
analyses and transformations that are not feasible to perform on normal
<td class="left"><tt>< { i32, i32, i32 } ></tt></td>
<td class="left">A triple of three <tt>i32</tt> values</td>
</tr><tr class="layout">
- <td class="left"><tt>< { float, i32 (i32)* } ></tt></td>
+ <td class="left">
+<tt>< { float, i32 (i32)* } ></tt></td>
<td class="left">A pair, where the first element is a <tt>float</tt> and the
second element is a <a href="#t_pointer">pointer</a> to a
<a href="#t_function">function</a> that takes an <tt>i32</tt>, returning
was stored to memory and read back as TYPE. In other words, no bits change
with this operator, just the type. This can be used for conversion of
vector types to any other type, as long as they have the same bit width. For
- pointers it is only valid to cast to another pointer type.
+ pointers it is only valid to cast to another pointer type. It is not valid
+ to bitcast to or from an aggregate type.
</dd>
<dt><b><tt>getelementptr ( CSTPTR, IDX0, IDX1, ... )</tt></b></dt>
<h5>Syntax:</h5>
<pre>
- <result> = add <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+ <result> = add <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<h5>Syntax:</h5>
<pre>
- <result> = sub <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+ <result> = sub <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = mul <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = mul <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>mul</tt>' instruction returns the product of its two
</a></div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = udiv <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = udiv <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>udiv</tt>' instruction returns the quotient of its two
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- <result> = sdiv <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+ <result> = sdiv <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<div class="doc_text">
<h5>Syntax:</h5>
<pre>
- <result> = fdiv <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+ <result> = fdiv <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = urem <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = urem <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>urem</tt>' instruction returns the remainder from the
<h5>Syntax:</h5>
<pre>
- <result> = srem <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+ <result> = srem <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<h5>Semantics:</h5>
<p>This instruction returns the <i>remainder</i> of a division (where the result
-has the same sign as the dividend, <tt>var1</tt>), not the <i>modulo</i>
-operator (where the result has the same sign as the divisor, <tt>var2</tt>) of
+has the same sign as the dividend, <tt>op1</tt>), not the <i>modulo</i>
+operator (where the result has the same sign as the divisor, <tt>op2</tt>) of
a value. For more information about the difference, see <a
href="http://mathforum.org/dr.math/problems/anne.4.28.99.html">The
Math Forum</a>. For a table of how this is implemented in various languages,
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = frem <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = frem <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>frem</tt>' instruction returns the remainder from the
Instruction</a> </div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = shl <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = shl <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<p>Both arguments to the '<tt>shl</tt>' instruction must be the same <a
href="#t_integer">integer</a> or <a href="#t_vector">vector</a> of integer
-type. '<tt>var2</tt>' is treated as an unsigned value.</p>
+type. '<tt>op2</tt>' is treated as an unsigned value.</p>
<h5>Semantics:</h5>
-<p>The value produced is <tt>var1</tt> * 2<sup><tt>var2</tt></sup> mod 2<sup>n</sup>,
-where n is the width of the result. If <tt>var2</tt> is (statically or dynamically) negative or
-equal to or larger than the number of bits in <tt>var1</tt>, the result is undefined.</p>
+<p>The value produced is <tt>op1</tt> * 2<sup><tt>op2</tt></sup> mod 2<sup>n</sup>,
+where n is the width of the result. If <tt>op2</tt> is (statically or dynamically) negative or
+equal to or larger than the number of bits in <tt>op1</tt>, the result is undefined.</p>
<h5>Example:</h5><pre>
<result> = shl i32 4, %var <i>; yields {i32}: 4 << %var</i>
Instruction</a> </div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = lshr <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = lshr <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<h5>Arguments:</h5>
<p>Both arguments to the '<tt>lshr</tt>' instruction must be the same
<a href="#t_integer">integer</a> or <a href="#t_vector">vector</a> of integer
-type. '<tt>var2</tt>' is treated as an unsigned value.</p>
+type. '<tt>op2</tt>' is treated as an unsigned value.</p>
<h5>Semantics:</h5>
<p>This instruction always performs a logical shift right operation. The most
significant bits of the result will be filled with zero bits after the
-shift. If <tt>var2</tt> is (statically or dynamically) equal to or larger than
-the number of bits in <tt>var1</tt>, the result is undefined.</p>
+shift. If <tt>op2</tt> is (statically or dynamically) equal to or larger than
+the number of bits in <tt>op1</tt>, the result is undefined.</p>
<h5>Example:</h5>
<pre>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = ashr <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = ashr <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<h5>Arguments:</h5>
<p>Both arguments to the '<tt>ashr</tt>' instruction must be the same
<a href="#t_integer">integer</a> or <a href="#t_vector">vector</a> of integer
-type. '<tt>var2</tt>' is treated as an unsigned value.</p>
+type. '<tt>op2</tt>' is treated as an unsigned value.</p>
<h5>Semantics:</h5>
<p>This instruction always performs an arithmetic shift right operation,
The most significant bits of the result will be filled with the sign bit
-of <tt>var1</tt>. If <tt>var2</tt> is (statically or dynamically) equal to or
-larger than the number of bits in <tt>var1</tt>, the result is undefined.
+of <tt>op1</tt>. If <tt>op2</tt> is (statically or dynamically) equal to or
+larger than the number of bits in <tt>op1</tt>, the result is undefined.
</p>
<h5>Example:</h5>
<h5>Syntax:</h5>
<pre>
- <result> = and <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+ <result> = and <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<h5>Semantics:</h5>
<p>The truth table used for the '<tt>and</tt>' instruction is:</p>
<p> </p>
-<div style="align: center">
+<div>
<table border="1" cellspacing="0" cellpadding="4">
<tbody>
<tr>
<div class="doc_subsubsection"> <a name="i_or">'<tt>or</tt>' Instruction</a> </div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = or <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = or <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>or</tt>' instruction returns the bitwise logical inclusive
<h5>Semantics:</h5>
<p>The truth table used for the '<tt>or</tt>' instruction is:</p>
<p> </p>
-<div style="align: center">
+<div>
<table border="1" cellspacing="0" cellpadding="4">
<tbody>
<tr>
Instruction</a> </div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = xor <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = xor <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>xor</tt>' instruction returns the bitwise logical exclusive
<p>The truth table used for the '<tt>xor</tt>' instruction is:</p>
<p> </p>
-<div style="align: center">
+<div>
<table border="1" cellspacing="0" cellpadding="4">
<tbody>
<tr>
<h5>Arguments:</h5>
<p>The '<tt>bitcast</tt>' instruction takes a value to cast, which must be
-a first class value, and a type to cast it to, which must also be a <a
- href="#t_firstclass">first class</a> type. The bit sizes of <tt>value</tt>
+a non-aggregate first class value, and a type to cast it to, which must also be
+a non-aggregate <a href="#t_firstclass">first class</a> type. The bit sizes of
+<tt>value</tt>
and the destination type, <tt>ty2</tt>, must be identical. If the source
type is a pointer, the destination type must also be a pointer. This
instruction supports bitwise conversion of vectors to integers and to vectors
</div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = icmp <cond> <ty> <var1>, <var2> <i>; yields {i1}:result</i>
+<pre> <result> = icmp <cond> <ty> <op1>, <op2> <i>; yields {i1} or {<N x i1>}:result</i>
</pre>
<h5>Overview:</h5>
-<p>The '<tt>icmp</tt>' instruction returns a boolean value based on comparison
-of its two integer or pointer operands.</p>
+<p>The '<tt>icmp</tt>' instruction returns a boolean value or
+a vector of boolean values based on comparison
+of its two integer, integer vector, or pointer operands.</p>
<h5>Arguments:</h5>
<p>The '<tt>icmp</tt>' instruction takes three operands. The first operand is
the condition code indicating the kind of comparison to perform. It is not
<li><tt>sle</tt>: signed less or equal</li>
</ol>
<p>The remaining two arguments must be <a href="#t_integer">integer</a> or
-<a href="#t_pointer">pointer</a> typed. They must also be identical types.</p>
+<a href="#t_pointer">pointer</a>
+or integer <a href="#t_vector">vector</a> typed.
+They must also be identical types.</p>
<h5>Semantics:</h5>
-<p>The '<tt>icmp</tt>' compares <tt>var1</tt> and <tt>var2</tt> according to
+<p>The '<tt>icmp</tt>' compares <tt>op1</tt> and <tt>op2</tt> according to
the condition code given as <tt>cond</tt>. The comparison performed always
-yields a <a href="#t_primitive">i1</a> result, as follows:
+yields either an <a href="#t_primitive"><tt>i1</tt></a> or vector of <tt>i1</tt> result, as follows:
<ol>
<li><tt>eq</tt>: yields <tt>true</tt> if the operands are equal,
<tt>false</tt> otherwise. No sign interpretation is necessary or performed.
<li><tt>ne</tt>: yields <tt>true</tt> if the operands are unequal,
<tt>false</tt> otherwise. No sign interpretation is necessary or performed.
<li><tt>ugt</tt>: interprets the operands as unsigned values and yields
- <tt>true</tt> if <tt>var1</tt> is greater than <tt>var2</tt>.</li>
+ <tt>true</tt> if <tt>op1</tt> is greater than <tt>op2</tt>.</li>
<li><tt>uge</tt>: interprets the operands as unsigned values and yields
- <tt>true</tt> if <tt>var1</tt> is greater than or equal to <tt>var2</tt>.</li>
+ <tt>true</tt> if <tt>op1</tt> is greater than or equal to <tt>op2</tt>.</li>
<li><tt>ult</tt>: interprets the operands as unsigned values and yields
- <tt>true</tt> if <tt>var1</tt> is less than <tt>var2</tt>.</li>
+ <tt>true</tt> if <tt>op1</tt> is less than <tt>op2</tt>.</li>
<li><tt>ule</tt>: interprets the operands as unsigned values and yields
- <tt>true</tt> if <tt>var1</tt> is less than or equal to <tt>var2</tt>.</li>
+ <tt>true</tt> if <tt>op1</tt> is less than or equal to <tt>op2</tt>.</li>
<li><tt>sgt</tt>: interprets the operands as signed values and yields
- <tt>true</tt> if <tt>var1</tt> is greater than <tt>var2</tt>.</li>
+ <tt>true</tt> if <tt>op1</tt> is greater than <tt>op2</tt>.</li>
<li><tt>sge</tt>: interprets the operands as signed values and yields
- <tt>true</tt> if <tt>var1</tt> is greater than or equal to <tt>var2</tt>.</li>
+ <tt>true</tt> if <tt>op1</tt> is greater than or equal to <tt>op2</tt>.</li>
<li><tt>slt</tt>: interprets the operands as signed values and yields
- <tt>true</tt> if <tt>var1</tt> is less than <tt>var2</tt>.</li>
+ <tt>true</tt> if <tt>op1</tt> is less than <tt>op2</tt>.</li>
<li><tt>sle</tt>: interprets the operands as signed values and yields
- <tt>true</tt> if <tt>var1</tt> is less than or equal to <tt>var2</tt>.</li>
+ <tt>true</tt> if <tt>op1</tt> is less than or equal to <tt>op2</tt>.</li>
</ol>
<p>If the operands are <a href="#t_pointer">pointer</a> typed, the pointer
values are compared as if they were integers.</p>
+<p>If the operands are integer vectors, then they are compared
+element by element. The result is an <tt>i1</tt> vector with
+the same number of elements as the values being compared.
+Otherwise, the result is an <tt>i1</tt>.
+</p>
<h5>Example:</h5>
<pre> <result> = icmp eq i32 4, 5 <i>; yields: result=false</i>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = fcmp <cond> <ty> <var1>, <var2> <i>; yields {i1}:result</i>
+<pre> <result> = fcmp <cond> <ty> <op1>, <op2> <i>; yields {i1} or {<N x i1>}:result</i>
</pre>
<h5>Overview:</h5>
-<p>The '<tt>fcmp</tt>' instruction returns a boolean value based on comparison
-of its floating point operands.</p>
+<p>The '<tt>fcmp</tt>' instruction returns a boolean value
+or vector of boolean values based on comparison
+of its operands.
+<p>
+If the operands are floating point scalars, then the result
+type is a boolean (<a href="#t_primitive"><tt>i1</tt></a>).
+</p>
+<p>If the operands are floating point vectors, then the result type
+is a vector of boolean with the same number of elements as the
+operands being compared.</p>
<h5>Arguments:</h5>
<p>The '<tt>fcmp</tt>' instruction takes three operands. The first operand is
the condition code indicating the kind of comparison to perform. It is not
</ol>
<p><i>Ordered</i> means that neither operand is a QNAN while
<i>unordered</i> means that either operand may be a QNAN.</p>
-<p>The <tt>val1</tt> and <tt>val2</tt> arguments must be
-<a href="#t_floating">floating point</a> typed. They must have identical
-types.</p>
+<p>Each of <tt>val1</tt> and <tt>val2</tt> arguments must be
+either a <a href="#t_floating">floating point</a> type
+or a <a href="#t_vector">vector</a> of floating point type.
+They must have identical types.</p>
<h5>Semantics:</h5>
-<p>The '<tt>fcmp</tt>' instruction compares <tt>var1</tt> and <tt>var2</tt>
-according to the condition code given as <tt>cond</tt>. The comparison performed
-always yields a <a href="#t_primitive">i1</a> result, as follows:
+<p>The '<tt>fcmp</tt>' instruction compares <tt>op1</tt> and <tt>op2</tt>
+according to the condition code given as <tt>cond</tt>.
+If the operands are vectors, then the vectors are compared
+element by element.
+Each comparison performed
+always yields an <a href="#t_primitive">i1</a> result, as follows:
<ol>
<li><tt>false</tt>: always yields <tt>false</tt>, regardless of operands.</li>
<li><tt>oeq</tt>: yields <tt>true</tt> if both operands are not a QNAN and
- <tt>var1</tt> is equal to <tt>var2</tt>.</li>
+ <tt>op1</tt> is equal to <tt>op2</tt>.</li>
<li><tt>ogt</tt>: yields <tt>true</tt> if both operands are not a QNAN and
- <tt>var1</tt> is greather than <tt>var2</tt>.</li>
+ <tt>op1</tt> is greather than <tt>op2</tt>.</li>
<li><tt>oge</tt>: yields <tt>true</tt> if both operands are not a QNAN and
- <tt>var1</tt> is greater than or equal to <tt>var2</tt>.</li>
+ <tt>op1</tt> is greater than or equal to <tt>op2</tt>.</li>
<li><tt>olt</tt>: yields <tt>true</tt> if both operands are not a QNAN and
- <tt>var1</tt> is less than <tt>var2</tt>.</li>
+ <tt>op1</tt> is less than <tt>op2</tt>.</li>
<li><tt>ole</tt>: yields <tt>true</tt> if both operands are not a QNAN and
- <tt>var1</tt> is less than or equal to <tt>var2</tt>.</li>
+ <tt>op1</tt> is less than or equal to <tt>op2</tt>.</li>
<li><tt>one</tt>: yields <tt>true</tt> if both operands are not a QNAN and
- <tt>var1</tt> is not equal to <tt>var2</tt>.</li>
+ <tt>op1</tt> is not equal to <tt>op2</tt>.</li>
<li><tt>ord</tt>: yields <tt>true</tt> if both operands are not a QNAN.</li>
<li><tt>ueq</tt>: yields <tt>true</tt> if either operand is a QNAN or
- <tt>var1</tt> is equal to <tt>var2</tt>.</li>
+ <tt>op1</tt> is equal to <tt>op2</tt>.</li>
<li><tt>ugt</tt>: yields <tt>true</tt> if either operand is a QNAN or
- <tt>var1</tt> is greater than <tt>var2</tt>.</li>
+ <tt>op1</tt> is greater than <tt>op2</tt>.</li>
<li><tt>uge</tt>: yields <tt>true</tt> if either operand is a QNAN or
- <tt>var1</tt> is greater than or equal to <tt>var2</tt>.</li>
+ <tt>op1</tt> is greater than or equal to <tt>op2</tt>.</li>
<li><tt>ult</tt>: yields <tt>true</tt> if either operand is a QNAN or
- <tt>var1</tt> is less than <tt>var2</tt>.</li>
+ <tt>op1</tt> is less than <tt>op2</tt>.</li>
<li><tt>ule</tt>: yields <tt>true</tt> if either operand is a QNAN or
- <tt>var1</tt> is less than or equal to <tt>var2</tt>.</li>
+ <tt>op1</tt> is less than or equal to <tt>op2</tt>.</li>
<li><tt>une</tt>: yields <tt>true</tt> if either operand is a QNAN or
- <tt>var1</tt> is not equal to <tt>var2</tt>.</li>
+ <tt>op1</tt> is not equal to <tt>op2</tt>.</li>
<li><tt>uno</tt>: yields <tt>true</tt> if either operand is a QNAN.</li>
<li><tt>true</tt>: always yields <tt>true</tt>, regardless of operands.</li>
</ol>
<h5>Example:</h5>
<pre> <result> = fcmp oeq float 4.0, 5.0 <i>; yields: result=false</i>
- <result> = icmp one float 4.0, 5.0 <i>; yields: result=true</i>
- <result> = icmp olt float 4.0, 5.0 <i>; yields: result=true</i>
- <result> = icmp ueq double 1.0, 2.0 <i>; yields: result=false</i>
+ <result> = fcmp one float 4.0, 5.0 <i>; yields: result=true</i>
+ <result> = fcmp olt float 4.0, 5.0 <i>; yields: result=true</i>
+ <result> = fcmp ueq double 1.0, 2.0 <i>; yields: result=false</i>
</pre>
</div>
</div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = vicmp <cond> <ty> <var1>, <var2> <i>; yields {ty}:result</i>
+<pre> <result> = vicmp <cond> <ty> <op1>, <op2> <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
<p>The '<tt>vicmp</tt>' instruction returns an integer vector value based on
<li><tt>slt</tt>: signed less than</li>
<li><tt>sle</tt>: signed less or equal</li>
</ol>
-<p>The remaining two arguments must be <a href="#t_vector">vector</a> of
+<p>The remaining two arguments must be <a href="#t_vector">vector</a> or
<a href="#t_integer">integer</a> typed. They must also be identical types.</p>
<h5>Semantics:</h5>
-<p>The '<tt>vicmp</tt>' instruction compares <tt>var1</tt> and <tt>var2</tt>
+<p>The '<tt>vicmp</tt>' instruction compares <tt>op1</tt> and <tt>op2</tt>
according to the condition code given as <tt>cond</tt>. The comparison yields a
<a href="#t_vector">vector</a> of <a href="#t_integer">integer</a> result, of
identical type as the values being compared. The most significant bit in each
</div>
<div class="doc_text">
<h5>Syntax:</h5>
-<pre> <result> = vfcmp <cond> <ty> <var1>, <var2></pre>
+<pre> <result> = vfcmp <cond> <ty> <op1>, <op2></pre>
<h5>Overview:</h5>
<p>The '<tt>vfcmp</tt>' instruction returns an integer vector value based on
element-wise comparison of its two floating point vector operands. The output
<a href="#t_floating">floating point</a> typed. They must also be identical
types.</p>
<h5>Semantics:</h5>
-<p>The '<tt>vfcmp</tt>' instruction compares <tt>var1</tt> and <tt>var2</tt>
+<p>The '<tt>vfcmp</tt>' instruction compares <tt>op1</tt> and <tt>op2</tt>
according to the condition code given as <tt>cond</tt>. The comparison yields a
<a href="#t_vector">vector</a> of <a href="#t_integer">integer</a> result, with
an identical number of elements as the values being compared, and each element
<h5>Syntax:</h5>
<pre>
- <result> = select i1 <cond>, <ty> <val1>, <ty> <val2> <i>; yields ty</i>
+ <result> = select <i>selty</i> <cond>, <ty> <val1>, <ty> <val2> <i>; yields ty</i>
+
+ <i>selty</i> is either i1 or {<N x i1>}
</pre>
<h5>Overview:</h5>
<h5>Arguments:</h5>
<p>
-The '<tt>select</tt>' instruction requires an 'i1' value indicating the
+The '<tt>select</tt>' instruction requires an 'i1' value or
+a vector of 'i1' values indicating the
condition, and two values of the same <a href="#t_firstclass">first class</a>
-type. If the val1/val2 are vectors, the entire vectors are selected, not
+type. If the val1/val2 are vectors and
+the condition is a scalar, then entire vectors are selected, not
individual elements.
</p>
<h5>Semantics:</h5>
<p>
-If the i1 condition evaluates is 1, the instruction returns the first
+If the condition is an i1 and it evaluates to 1, the instruction returns the first
value argument; otherwise, it returns the second value argument.
</p>
+<p>
+If the condition is a vector of i1, then the value arguments must
+be vectors of the same size, and the selection is done element
+by element.
+</p>
<h5>Example:</h5>
<p>
LLVM support for <a href="GarbageCollection.html">Accurate Garbage
-Collection</a> requires the implementation and generation of these intrinsics.
+Collection</a> (GC) requires the implementation and generation of these
+intrinsics.
These intrinsics allow identification of <a href="#int_gcroot">GC roots on the
stack</a>, as well as garbage collector implementations that require <a
href="#int_gcread">read</a> and <a href="#int_gcwrite">write</a> barriers.
<p>
The '<tt>llvm.pcmarker</tt>' intrinsic is a method to export a Program Counter
-(PC) in a region of
-code to simulators and other tools. The method is target specific, but it is
-expected that the marker will use exported symbols to transmit the PC of the marker.
-The marker makes no guarantees that it will remain with any specific instruction
-after optimizations. It is possible that the presence of a marker will inhibit
+(PC) in a region of
+code to simulators and other tools. The method is target specific, but it is
+expected that the marker will use exported symbols to transmit the PC of the
+marker.
+The marker makes no guarantees that it will remain with any specific instruction
+after optimizations. It is possible that the presence of a marker will inhibit
optimizations. The intended use is to be inserted after optimizations to allow
correlations of simulation runs.
</p>
These intrinsic functions expand the "universal IR" of LLVM to represent
hardware constructs for atomic operations and memory synchronization. This
provides an interface to the hardware, not an interface to the programmer. It
- is aimed at a low enough level to allow any programming models or APIs which
+ is aimed at a low enough level to allow any programming models or APIs
+ (Application Programming Interfaces) which
need atomic behaviors to map cleanly onto it. It is also modeled primarily on
hardware behavior. Just as hardware provides a "universal IR" for source
languages, it also provides a starting point for developing a "universal"
<div class="doc_text">
<h5>Syntax:</h5>
<p>
- This is an overloaded intrinsic. You can use <tt>llvm.atomic.cmp.swap</tt> on any
- integer bit width. Not all targets support all bit widths however.</p>
+ This is an overloaded intrinsic. You can use <tt>llvm.atomic.cmp.swap</tt> on
+ any integer bit width and for different address spaces. Not all targets
+ support all bit widths however.</p>
<pre>
-declare i8 @llvm.atomic.cmp.swap.i8( i8* <ptr>, i8 <cmp>, i8 <val> )
-declare i16 @llvm.atomic.cmp.swap.i16( i16* <ptr>, i16 <cmp>, i16 <val> )
-declare i32 @llvm.atomic.cmp.swap.i32( i32* <ptr>, i32 <cmp>, i32 <val> )
-declare i64 @llvm.atomic.cmp.swap.i64( i64* <ptr>, i64 <cmp>, i64 <val> )
+declare i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* <ptr>, i8 <cmp>, i8 <val> )
+declare i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* <ptr>, i16 <cmp>, i16 <val> )
+declare i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* <ptr>, i32 <cmp>, i32 <val> )
+declare i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* <ptr>, i64 <cmp>, i64 <val> )
</pre>
<h5>Overview:</h5>
store i32 4, %ptr
%val1 = add i32 4, 4
-%result1 = call i32 @llvm.atomic.cmp.swap.i32( i32* %ptr, i32 4, %val1 )
+%result1 = call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %ptr, i32 4, %val1 )
<i>; yields {i32}:result1 = 4</i>
%stored1 = icmp eq i32 %result1, 4 <i>; yields {i1}:stored1 = true</i>
%memval1 = load i32* %ptr <i>; yields {i32}:memval1 = 8</i>
%val2 = add i32 1, 1
-%result2 = call i32 @llvm.atomic.cmp.swap.i32( i32* %ptr, i32 5, %val2 )
+%result2 = call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %ptr, i32 5, %val2 )
<i>; yields {i32}:result2 = 8</i>
%stored2 = icmp eq i32 %result2, 5 <i>; yields {i1}:stored2 = false</i>
This is an overloaded intrinsic. You can use <tt>llvm.atomic.swap</tt> on any
integer bit width. Not all targets support all bit widths however.</p>
<pre>
-declare i8 @llvm.atomic.swap.i8( i8* <ptr>, i8 <val> )
-declare i16 @llvm.atomic.swap.i16( i16* <ptr>, i16 <val> )
-declare i32 @llvm.atomic.swap.i32( i32* <ptr>, i32 <val> )
-declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> )
+declare i8 @llvm.atomic.swap.i8.p0i8( i8* <ptr>, i8 <val> )
+declare i16 @llvm.atomic.swap.i16.p0i16( i16* <ptr>, i16 <val> )
+declare i32 @llvm.atomic.swap.i32.p0i32( i32* <ptr>, i32 <val> )
+declare i64 @llvm.atomic.swap.i64.p0i64( i64* <ptr>, i64 <val> )
</pre>
<h5>Overview:</h5>
store i32 4, %ptr
%val1 = add i32 4, 4
-%result1 = call i32 @llvm.atomic.swap.i32( i32* %ptr, i32 %val1 )
+%result1 = call i32 @llvm.atomic.swap.i32.p0i32( i32* %ptr, i32 %val1 )
<i>; yields {i32}:result1 = 4</i>
%stored1 = icmp eq i32 %result1, 4 <i>; yields {i1}:stored1 = true</i>
%memval1 = load i32* %ptr <i>; yields {i32}:memval1 = 8</i>
%val2 = add i32 1, 1
-%result2 = call i32 @llvm.atomic.swap.i32( i32* %ptr, i32 %val2 )
+%result2 = call i32 @llvm.atomic.swap.i32.p0i32( i32* %ptr, i32 %val2 )
<i>; yields {i32}:result2 = 8</i>
%stored2 = icmp eq i32 %result2, 8 <i>; yields {i1}:stored2 = true</i>
This is an overloaded intrinsic. You can use <tt>llvm.atomic.load.add</tt> on any
integer bit width. Not all targets support all bit widths however.</p>
<pre>
-declare i8 @llvm.atomic.load.add.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.add.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.add.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.add.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.add.i8..p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.add.i16..p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.add.i32..p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.add.i64..p0i64( i64* <ptr>, i64 <delta> )
</pre>
<h5>Overview:</h5>
<pre>
%ptr = malloc i32
store i32 4, %ptr
-%result1 = call i32 @llvm.atomic.load.add.i32( i32* %ptr, i32 4 )
+%result1 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 4 )
<i>; yields {i32}:result1 = 4</i>
-%result2 = call i32 @llvm.atomic.load.add.i32( i32* %ptr, i32 2 )
+%result2 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 2 )
<i>; yields {i32}:result2 = 8</i>
-%result3 = call i32 @llvm.atomic.load.add.i32( i32* %ptr, i32 5 )
+%result3 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 5 )
<i>; yields {i32}:result3 = 10</i>
%memval1 = load i32* %ptr <i>; yields {i32}:memval1 = 15</i>
</pre>
<h5>Syntax:</h5>
<p>
This is an overloaded intrinsic. You can use <tt>llvm.atomic.load.sub</tt> on
- any integer bit width. Not all targets support all bit widths however.</p>
+ any integer bit width and for different address spaces. Not all targets
+ support all bit widths however.</p>
<pre>
-declare i8 @llvm.atomic.load.sub.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.sub.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.sub.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.sub.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.sub.i8.p0i32( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.sub.i16.p0i32( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.sub.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.sub.i64.p0i32( i64* <ptr>, i64 <delta> )
</pre>
<h5>Overview:</h5>
<pre>
%ptr = malloc i32
store i32 8, %ptr
-%result1 = call i32 @llvm.atomic.load.sub.i32( i32* %ptr, i32 4 )
+%result1 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 4 )
<i>; yields {i32}:result1 = 8</i>
-%result2 = call i32 @llvm.atomic.load.sub.i32( i32* %ptr, i32 2 )
+%result2 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 2 )
<i>; yields {i32}:result2 = 4</i>
-%result3 = call i32 @llvm.atomic.load.sub.i32( i32* %ptr, i32 5 )
+%result3 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 5 )
<i>; yields {i32}:result3 = 2</i>
%memval1 = load i32* %ptr <i>; yields {i32}:memval1 = -3</i>
</pre>
<p>
These are overloaded intrinsics. You can use <tt>llvm.atomic.load_and</tt>,
<tt>llvm.atomic.load_nand</tt>, <tt>llvm.atomic.load_or</tt>, and
- <tt>llvm.atomic.load_xor</tt> on any integer bit width. Not all targets
- support all bit widths however.</p>
+ <tt>llvm.atomic.load_xor</tt> on any integer bit width and for different
+ address spaces. Not all targets support all bit widths however.</p>
<pre>
-declare i8 @llvm.atomic.load.and.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.and.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.and.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.and.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.and.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.and.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.and.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.and.i64.p0i64( i64* <ptr>, i64 <delta> )
</pre>
<pre>
-declare i8 @llvm.atomic.load.or.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.or.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.or.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.or.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.or.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.or.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.or.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.or.i64.p0i64( i64* <ptr>, i64 <delta> )
</pre>
<pre>
-declare i8 @llvm.atomic.load.nand.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.nand.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.nand.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.nand.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.nand.i8.p0i32( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.nand.i16.p0i32( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.nand.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.nand.i64.p0i32( i64* <ptr>, i64 <delta> )
</pre>
<pre>
-declare i8 @llvm.atomic.load.xor.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.xor.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.xor.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.xor.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.xor.i8.p0i32( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.xor.i16.p0i32( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.xor.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.xor.i64.p0i32( i64* <ptr>, i64 <delta> )
</pre>
<h5>Overview:</h5>
<pre>
%ptr = malloc i32
store i32 0x0F0F, %ptr
-%result0 = call i32 @llvm.atomic.load.nand.i32( i32* %ptr, i32 0xFF )
+%result0 = call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %ptr, i32 0xFF )
<i>; yields {i32}:result0 = 0x0F0F</i>
-%result1 = call i32 @llvm.atomic.load.and.i32( i32* %ptr, i32 0xFF )
+%result1 = call i32 @llvm.atomic.load.and.i32.p0i32( i32* %ptr, i32 0xFF )
<i>; yields {i32}:result1 = 0xFFFFFFF0</i>
-%result2 = call i32 @llvm.atomic.load.or.i32( i32* %ptr, i32 0F )
+%result2 = call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ptr, i32 0F )
<i>; yields {i32}:result2 = 0xF0</i>
-%result3 = call i32 @llvm.atomic.load.xor.i32( i32* %ptr, i32 0F )
+%result3 = call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %ptr, i32 0F )
<i>; yields {i32}:result3 = FF</i>
%memval1 = load i32* %ptr <i>; yields {i32}:memval1 = F0</i>
</pre>
<p>
These are overloaded intrinsics. You can use <tt>llvm.atomic.load_max</tt>,
<tt>llvm.atomic.load_min</tt>, <tt>llvm.atomic.load_umax</tt>, and
- <tt>llvm.atomic.load_umin</tt> on any integer bit width. Not all targets
+ <tt>llvm.atomic.load_umin</tt> on any integer bit width and for different
+ address spaces. Not all targets
support all bit widths however.</p>
<pre>
-declare i8 @llvm.atomic.load.max.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.max.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.max.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.max.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.max.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.max.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.max.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.max.i64.p0i64( i64* <ptr>, i64 <delta> )
</pre>
<pre>
-declare i8 @llvm.atomic.load.min.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.min.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.min.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.min.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.min.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.min.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.min.i32..p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.min.i64..p0i64( i64* <ptr>, i64 <delta> )
</pre>
<pre>
-declare i8 @llvm.atomic.load.umax.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.umax.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.umax.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.umax.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.umax.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.umax.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.umax.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.umax.i64.p0i64( i64* <ptr>, i64 <delta> )
</pre>
<pre>
-declare i8 @llvm.atomic.load.umin.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.umin.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.umin.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.umin.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.umin.i8..p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.umin.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.umin.i32..p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.umin.i64..p0i64( i64* <ptr>, i64 <delta> )
</pre>
<h5>Overview:</h5>
<pre>
%ptr = malloc i32
store i32 7, %ptr
-%result0 = call i32 @llvm.atomic.load.min.i32( i32* %ptr, i32 -2 )
+%result0 = call i32 @llvm.atomic.load.min.i32.p0i32( i32* %ptr, i32 -2 )
<i>; yields {i32}:result0 = 7</i>
-%result1 = call i32 @llvm.atomic.load.max.i32( i32* %ptr, i32 8 )
+%result1 = call i32 @llvm.atomic.load.max.i32.p0i32( i32* %ptr, i32 8 )
<i>; yields {i32}:result1 = -2</i>
-%result2 = call i32 @llvm.atomic.load.umin.i32( i32* %ptr, i32 10 )
+%result2 = call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %ptr, i32 10 )
<i>; yields {i32}:result2 = 8</i>
-%result3 = call i32 @llvm.atomic.load.umax.i32( i32* %ptr, i32 30 )
+%result3 = call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %ptr, i32 30 )
<i>; yields {i32}:result3 = 8</i>
%memval1 = load i32* %ptr <i>; yields {i32}:memval1 = 30</i>
</pre>
projects / oota-llvm.git / blobdiff