DI/Verifier: Fix argument bitrot in DILocalVariable

[oota-llvm.git] / docs / LangRef.rst

diff --git a/docs/LangRef.rst b/docs/LangRef.rst
index 48771c211c1659bfc72fbde322dbd94e624a740b..c5035984f3b71ccaad737f898d4a01b4dcc16ab5 100644 (file)
--- a/docs/LangRef.rst
+++ b/docs/LangRef.rst
@@ -3200,7 +3200,8 @@ MIPS:
   ``sc`` instruction on the given subtarget (details vary).
 - ``r``, ``d``,  ``y``: A 32 or 64-bit GPR register.
 - ``f``: A 32 or 64-bit FPU register (``F0-F31``), or a 128-bit MSA register
-  (``W0-W31``).
+  (``W0-W31``). In the case of MSA registers, it is recommended to use the ``w``
+  argument modifier for compatibility with GCC.
 - ``c``: A 32-bit or 64-bit GPR register suitable for indirect jump (always
   ``25``).
 - ``l``: The ``lo`` register, 32 or 64-bit.
@@ -3409,7 +3410,9 @@ MIPS:
   second word of a double-word memory operand. (On a big-endian system, ``D`` is
   equivalent to ``L``, and on little-endian system, ``D`` is equivalent to
   ``M``.)
-- ``w``: No effect.
+- ``w``: No effect. Provided for compatibility with GCC which requires this
+  modifier in order to print MSA registers (``W0-W31``) with the ``f``
+  constraint.
 
 NVPTX:
 
@@ -3903,12 +3906,12 @@ specifies the argument position, and this variable will be included in the
 
 .. code-block:: llvm
 
-    !0 = !DILocalVariable(tag: DW_TAG_arg_variable, name: "this", arg: 0,
+    !0 = !DILocalVariable(tag: DW_TAG_arg_variable, name: "this", arg: 1,
                           scope: !3, file: !2, line: 7, type: !3,
                           flags: DIFlagArtificial)
-    !1 = !DILocalVariable(tag: DW_TAG_arg_variable, name: "x", arg: 1,
+    !1 = !DILocalVariable(tag: DW_TAG_arg_variable, name: "x", arg: 2,
                           scope: !4, file: !2, line: 7, type: !3)
-    !1 = !DILocalVariable(tag: DW_TAG_auto_variable, name: "y",
+    !2 = !DILocalVariable(tag: DW_TAG_auto_variable, name: "y",
                           scope: !5, file: !2, line: 7, type: !3)
 
 DIExpression
@@ -10325,6 +10328,65 @@ Examples:
 
       %r2 = call float @llvm.fmuladd.f32(float %a, float %b, float %c) ; yields float:r2 = (a * b) + c
 
+
+'``llvm.uabsdiff.*``' and '``llvm.sabsdiff.*``' Intrinsics
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+This is an overloaded intrinsic. The loaded data is a vector of any integer bit width.
+
+.. code-block:: llvm
+
+      declare <4 x integer> @llvm.uabsdiff.v4i32(<4 x integer> %a, <4 x integer> %b)
+
+
+Overview:
+"""""""""
+
+The ``llvm.uabsdiff`` intrinsic returns a vector result of the absolute difference of the two operands,
+treating them both as unsigned integers.
+
+The ``llvm.sabsdiff`` intrinsic returns  a vector result of the absolute difference of the two operands,
+treating them both as signed integers.
+
+.. note::
+
+    These intrinsics are primarily used during the code generation stage of compilation.
+    They are generated by compiler passes such as the Loop and SLP vectorizers.it is not
+    recommended for users to create them manually.
+
+Arguments:
+""""""""""
+
+Both intrinsics take two integer of the same bitwidth.
+
+Semantics:
+""""""""""
+
+The expression::
+
+    call <4 x i32> @llvm.uabsdiff.v4i32(<4 x i32> %a, <4 x i32> %b)
+
+is equivalent to::
+
+    %sub = sub <4 x i32> %a, %b
+    %ispos = icmp ugt <4 x i32> %sub, <i32 -1, i32 -1, i32 -1, i32 -1>
+    %neg = sub <4 x i32> zeroinitializer, %sub
+    %1 = select <4 x i1> %ispos, <4 x i32> %sub, <4 x i32> %neg
+
+Similarly the expression::
+
+    call <4 x i32> @llvm.sabsdiff.v4i32(<4 x i32> %a, <4 x i32> %b)
+
+is equivalent to::
+
+    %sub = sub nsw <4 x i32> %a, %b
+    %ispos = icmp sgt <4 x i32> %sub, <i32 -1, i32 -1, i32 -1, i32 -1>
+    %neg = sub nsw <4 x i32> zeroinitializer, %sub
+    %1 = select <4 x i1> %ispos, <4 x i32> %sub, <4 x i32> %neg
+
+
 Half Precision Floating Point Intrinsics
 ----------------------------------------