<p>In the LLVM 2.8 time-frame, the Clang team has made many improvements:</p>
-<ul>
-<li>Surely these guys have done something</li>
-<li>X86-64 abi improvements? Did they make it in?</li>
-</ul>
+ <ul>
+ <li>Clang C++ is now feature-complete with respect to the ISO C++ 1998 and 2003 standards.</li>
+ <li>Added support for Objective-C++.</li>
+ <li>Clang now uses LLVM-MC to directly generate object code and to parse inline assembly (on Darwin).</li>
+ <li>Introduced many new warnings, including <code>-Wmissing-field-initializers</code>, <code>-Wshadow</code>, <code>-Wno-protocol</code>, <code>-Wtautological-compare</code>, <code>-Wstrict-selector-match</code>, <code>-Wcast-align</code>, <code>-Wunused</code> improvements, and greatly improved format-string checking.</li>
+ <li>Introduced the "libclang" library, a C interface to Clang intended to support IDE clients.</li>
+ <li>Added support for <code>#pragma GCC visibility</code>, <code>#pragma align</code>, and others.</li>
+ <li>Added support for SSE, AVX, ARM NEON, and AltiVec.</li>
+ <li>Improved support for many Microsoft extensions.</li>
+ <li>Implemented support for blocks in C++.</li>
+ <li>Implemented precompiled headers for C++.</li>
+ <li>Improved abstract syntax trees to retain more accurate source information.</li>
+ <li>Added driver support for handling LLVM IR and bitcode files directly.</li>
+ <li>Major improvements to compiler correctness for exception handling.</li>
+ <li>Improved generated code quality in some areas:
+ <ul>
+ <li>Good code generation for X86-32 and X86-64 ABI handling.</li>
+ <li>Improved code generation for bit-fields, although important work remains.</li>
+ </ul>
+ </li>
+ </ul>
</div>
<!--=========================================================================-->
<li>Fortran programs using common variables now link correctly.</li>
<li>GNU OMP constructs no longer crash the compiler.</li>
</ul>
-</p>
</div>
<div class="doc_text">
<p>
-<a href="http://libc++.llvm.org/">libc++</a> is another new member of the LLVM
+<a href="http://libcxx.llvm.org/">libc++</a> is another new member of the LLVM
family. It is an implementation of the C++ standard library, written from the
ground up to specifically target the forthcoming C++'0X standard and focus on
delivering great performance.</p>
</div>
+
+<!--=========================================================================-->
+<div class="doc_subsection">
+<a name="klee">KLEE: A Symbolic Execution Virtual Machine</a>
+</div>
+
+<div class="doc_text">
+<p>
+<a href="http://klee.llvm.org/">KLEE</a> is a symbolic execution framework for
+programs in LLVM bitcode form. KLEE tries to symbolically evaluate "all" paths
+through the application and records state transitions that lead to fault
+states. This allows it to construct testcases that lead to faults and can even
+be used to verify some algorithms.
+</p>
+
+<p>Although KLEE does not have any major new features as of 2.8, we have made
+various minor improvements, particular to ease development:</p>
+<ul>
+ <li>Added support for LLVM 2.8. KLEE currently maintains compatibility with
+ LLVM 2.6, 2.7, and 2.8.</li>
+ <li>Added a buildbot for 2.6, 2.7, and trunk. A 2.8 buildbot will be coming
+ soon following release.</li>
+ <li>Fixed many C++ code issues to allow building with Clang++. Mostly
+ complete, except for the version of MiniSAT which is inside the KLEE STP
+ version.</li>
+ <li>Improved support for building with separate source and build
+ directories.</li>
+ <li>Added support for "long double" on x86.</li>
+ <li>Initial work on KLEE support for using 'lit' test runner instead of
+ DejaGNU.</li>
+ <li>Added <tt>configure</tt> support for using an external version of
+ STP.</li>
+</ul>
+
+</div>
+
+
<!-- *********************************************************************** -->
<div class="doc_section">
<a name="externalproj">External Open Source Projects Using LLVM 2.8</a>
language and compiler written on top of LLVM, intended for producing
single-address-space managed code operating systems that
run faster than the equivalent multiple-address-space C systems.
-More in-depth blurb is available on <a
-href="http://www.quokforge.org/projects/horizon/wiki/Wiki">the wiki</a>.</p>
+More in-depth blurb is available on
the <a
+href="http://www.quokforge.org/projects/horizon/wiki/Wiki">wiki</a>.</p>
</div>
<div class="doc_text">
<p>
-<a href=http://www.clamav.net>Clam AntiVirus</a> is an open source (GPL)
+<a href="http://www.clamav.net">Clam AntiVirus</a> is an open source (GPL)
anti-virus toolkit for UNIX, designed especially for e-mail scanning on mail
gateways. Since version 0.96 it has <a
href="http://vrt-sourcefire.blogspot.com/2010/09/introduction-to-clamavs-low-level.html">bytecode
signatures</a> that allow writing detections for complex malware. It
uses LLVM's JIT to speed up the execution of bytecode on
-X86,X86-64,PPC32/64, falling back to its own interpreter otherwise.
-The git version was updated to work with LLVM 2.8
+X86, X86-64, PPC32/64, falling back to its own interpreter otherwise.
+The git version was updated to work with LLVM 2.8.
</p>
<p>The <a
configurations are designed by MPEG Reconfigurable Video Coding (RVC) committee.
MPEG RVC standard is built on a stream-based dataflow representation of
decoders. It is composed of a standard library of coding tools written in
-RVC-CAL language and a dataflow configuration &emdash; block diagram &emdash;
+RVC-CAL language and a dataflow configuration — block diagram —
of a decoder.</p>
<p>Jade project is hosted as part of the <a href="http://orcc.sf.net">Open
<a href="http://tm.inf.tu-dresden.de">DTMC</a> provides support for
Transactional Memory, which is an easy-to-use and efficient way to synchronize
accesses to shared memory. Transactions can contain normal C/C++ code (e.g.,
-__transaction { list.remove(x); x.refCount--; }) and will be executed
+<code>__transaction { list.remove(x); x.refCount--; }</code>) and will be executed
virtually atomically and isolated from other transactions.</p>
</div>
<!--=========================================================================-->
<div class="doc_subsection">
-<a name="Kai">Kai Interpreter</a>
+<a name="Kai">Kai Programming Language</a>
</div>
<div class="doc_text">
<li>LLVM 2.8 now has pretty decent support for debugging optimized code. You
should be able to reliably get debug info for function arguments, assuming
that the value is actually available where you have stopped.</li>
-</ul>
<li>A new 'llvm-diff' tool is available that does a semantic diff of .ll
files.</li>
<li>The <a href="#mc">MC subproject</a> has made major progress in this release.
be 13 in one of the predecessors of a block. It does this in conjunction
with the new LazyValueInfo analysis pass.</li>
<li>The new RegionInfo analysis pass identifies single-entry single-exit regions
- in the CFG. You can play with it with the "opt -regions analyze" or
+ in the CFG. You can play with it with the "opt -regions -analyze" or
"opt -view-regions" commands.</li>
-<li>The loop optimizer has significantly improve strength reduction and analysis
+<li>The loop optimizer has significantly improved strength reduction and analysis
capabilities. Notably it is able to build on the trap value and signed
integer overflow information to optimize <= and >= loops.</li>
<li>The CallGraphSCCPassManager now has some basic support for iterating within
</div>
-
-<!--=========================================================================-->
-<div class="doc_subsection">
-<a name="executionengine">Interpreter and JIT Improvements</a>
-</div>
-
-<div class="doc_text">
-
-<ul>
-<li></li>
-
-</ul>
-
-</div>
-
<!--=========================================================================-->
<div class="doc_subsection">
<a name="mc">MC Level Improvements</a>
<li>The MC disassembler now fully supports ARM and Thumb. ARM assembler support
is still in early development though.</li>
<li>The X86 MC assembler now supports the X86 AES and AVX instruction set.</li>
-<li>Work on ELF and COFF support is well underway, but isn't useful yet in LLVM
- 2.8. Please contact the llvmdev mailing list if you're interested in
- this.</li>
+<li>Work on ELF and COFF object files and ARM target support is well underway,
+ but isn't useful yet in LLVM 2.8. Please contact the llvmdev mailing list
+ if you're interested in this.</li>
</ul>
<p>For more information, please see the <a
</div>
-
<!--=========================================================================-->
<div class="doc_subsection">
<a name="codegen">Target Independent Code Generator Improvements</a>
it run faster:</p>
<ul>
-<li></li>
-
- MachineCSE tuned and on by default.
-
- Rewrote tblgen's type inference for backends to be more consistent and
- diagnose more target bugs. This also allows limited support for writing
- patterns for instructions that return multiple results, e.g. a virtual
- register and a flag result. Stuff that used 'parallel' before should use
- this.
-
- New -regalloc=fast, =local got removed
- New -regalloc=default option that chooses a register allocator based on the -O optimization level.
- New SubRegIndex tblgen class for targets -> jakob
-
- Bottom up fast isel. Simple Load reuse. No more machinedce.
- IR ABI: <3 x float> is passed as <4 x float> instead of 3 floats.
-
- New COPY instruction. copyRegToReg -> copyPhysReg, isMoveInstr is gone.
- RenderMachineFunction: -rendermf
- SplitKit?
- Evan: Teach bottom up pre-ra scheduler to track register pressure. Work in progress.
- Evan: Add an ILP scheduler. On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2 by 16%.
-
- New OptimizeExts+OptimizeCmps -> PeepholeOptimizer pass
- New LocalStackSlotAllocation.cpp pass (jimg)
- Atomics now get legalized when not natively supported (jim g)
-
- -ffunction-sections and -fdata-sections are supported on ELF targets.
- -momit-leaf-frame-pointer now supported.
+<li>The clang/gcc -momit-leaf-frame-pointer argument is now supported.</li>
+<li>The clang/gcc -ffunction-sections and -fdata-sections arguments are now
+ supported on ELF targets (like GCC).</li>
+<li>The MachineCSE pass is now tuned and on by default. It eliminates common
+ subexpressions that are exposed when lowering to machine instructions.</li>
+<li>The "local" register allocator was replaced by a new "fast" register
+ allocator. This new allocator (which is often used at -O0) is substantially
+ faster and produces better code than the old local register allocator.</li>
+<li>A new LLC "-regalloc=default" option is available, which automatically
+ chooses a register allocator based on the -O optimization level.</li>
+<li>The common code generator code was modified to promote illegal argument and
+ return value vectors to wider ones when possible instead of scalarizing
+ them. For example, <3 x float> will now pass in one SSE register
+ instead of 3 on X86. This generates substantially better code since the
+ rest of the code generator was already expecting this.</li>
+<li>The code generator uses a new "COPY" machine instruction. This speeds up
+ the code generator and eliminates the need for targets to implement the
+ isMoveInstr hook. Also, the copyRegToReg hook was renamed to copyPhysReg
+ and simplified.</li>
+<li>The code generator now has a "LocalStackSlotPass", which optimizes stack
+ slot access for targets (like ARM) that have limited stack displacement
+ addressing.</li>
+<li>A new "PeepholeOptimizer" is available, which eliminates sign and zero
+ extends, and optimizes away compare instructions when the condition result
+ is available from a previous instruction.</li>
+<li>Atomic operations now get legalized into simpler atomic operations if not
+ natively supported, easing the implementation burden on targets.</li>
+<li>We have added two new bottom-up pre-allocation register pressure aware schedulers:
+<ol>
+<li>The hybrid scheduler schedules aggressively to minimize schedule length when registers are available and avoid overscheduling in high pressure situations.</li>
+<li>The instruction-level-parallelism scheduler schedules for maximum ILP when registers are available and avoid overscheduling in high pressure situations.</li>
+</ol></li>
+<li>The tblgen type inference algorithm was rewritten to be more consistent and
+ diagnose more target bugs. If you have an out-of-tree backend, you may
+ find that it finds bugs in your target description. This support also
+ allows limited support for writing patterns for instructions that return
+ multiple results (e.g. a virtual register and a flag result). The
+ 'parallel' modifier in tblgen was removed, you should use the new support
+ for multiple results instead.</li>
+<li>A new (experimental) "-rendermf" pass is available which renders a
+ MachineFunction into HTML, showing live ranges and other useful
+ details.</li>
+<li>The new SubRegIndex tablegen class allows subregisters to be indexed
+ symbolically instead of numerically. If your target uses subregisters you
+ will need to adapt to use SubRegIndex when you upgrade to 2.8.</li>
+<!-- SplitKit -->
+
+<li>The -fast-isel instruction selection path (used at -O0 on X86) was rewritten
+ to work bottom-up on basic blocks instead of top down. This makes it
+ slightly faster (because the MachineDCE pass is not needed any longer) and
+ allows it to generate better code in some cases.</li>
</ul>
</div>
</div>
<div class="doc_text">
-<p>New features of the X86 target include:
+<p>New features and major changes in the X86 target include:
</p>
<ul>
<li>The X86 backend now supports holding X87 floating point stack values
in registers across basic blocks, dramatically improving performance of code
- that uses long double, and when targetting CPUs that don't support SSE.</li>
-
- New SSEDomainFix pass:
- On Nehalem and newer CPUs there is a 2 cycle latency penalty on using a
- register in a different domain than where it was defined. Some instructions
- have equvivalents for different domains, like por/orps/orpd. The
- SSEDomainFix pass tries to minimize the number of domain crossings by
- changing between equvivalent opcodes where possible.
-
- X86 backend attempts to promote 16-bit integer operations to 32-bits to avoid
- 0x66 prefixes, which are slow on some microarchitectures and bloat the code
- on others.
-
- New support for X86 "thiscall" calling convention (x86_thiscallcc in IR) for windows.
-
- New llvm.x86.int intrinsic (for int $42 and int3)
-
- Verbose assembly decodes X86 shuffle instructions, e.g.:
- insertps $113, %xmm3, %xmm0 ## xmm0 = zero,xmm0[1,2],xmm3[1]
- unpcklps %xmm1, %xmm0 ## xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
- pshufd $1, %xmm1, %xmm1 ## xmm1 = xmm1[1,0,0,0]
+ that uses long double, and when targeting CPUs that don't support SSE.</li>
+
+<li>The X86 backend now uses a SSEDomainFix pass to optimize SSE operations. On
+ Nehalem ("Core i7") and newer CPUs there is a 2 cycle latency penalty on
+ using a register in a different domain than where it was defined. This pass
+ optimizes away these stalls.</li>
+
+<li>The X86 backend now promotes 16-bit integer operations to 32-bits when
+ possible. This avoids 0x66 prefixes, which are slow on some
+ microarchitectures and bloat the code on all of them.</li>
+
+<li>The X86 backend now supports the Microsoft "thiscall" calling convention,
+ and a <a href="LangRef.html#callingconv">calling convention</a> to support
+ <a href="#GHC">ghc</a>.</li>
+
+<li>The X86 backend supports a new "llvm.x86.int" intrinsic, which maps onto
+ the X86 "int $42" and "int3" instructions.</li>
+
+<li>At the IR level, the <2 x float> datatype is now promoted and passed
+ around as a <4 x float> instead of being passed and returned as an MMX
+ vector. If you have a frontend that uses this, please pass and return a
+ <2 x i32> instead (using bitcasts).</li>
+
+<li>When printing .s files in verbose assembly mode (the default for clang -S),
+ the X86 backend now decodes X86 shuffle instructions and prints human
+ readable comments after the most inscrutable of them, e.g.:
+
+<pre>
+ insertps $113, %xmm3, %xmm0 <i># xmm0 = zero,xmm0[1,2],xmm3[1]</i>
+ unpcklps %xmm1, %xmm0 <i># xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]</i>
+ pshufd $1, %xmm1, %xmm1 <i># xmm1 = xmm1[1,0,0,0]</i>
+</pre>
+</li>
- X86 ABI: <2 x float> in IR no longer maps onto MMX, it turns into <4 x float>
-
- new GHC calling convention
-
</ul>
</div>
</p>
<ul>
-
- NEON: Better performance for QQQQ (4-consecutive Q register) instructions. New reg sequence abstraction?
- ARM: Better scheduling (list-hybrid, hybrid?)
- ARM: Tail call support.
- ARM: General performance work and tuning.
-
- ARM: Half float support through intrinsics LangRef.html#int_fp16
-<li>ARMGlobalMerge: <!-- Anton --> </li>
+<li>The ARM backend now optimizes tail calls into jumps.</li>
+<li>Scheduling is improved through the new list-hybrid scheduler as well
+ as through better modeling of structural hazards.</li>
+<li><a href="LangRef.html#int_fp16">Half float</a> instructions are now
+ supported.</li>
+<li>NEON support has been improved to model instructions which operate onto
+ multiple consecutive registers more aggressively. This avoids lots of
+ extraneous register copies.</li>
+<li>The ARM backend now uses a new "ARMGlobalMerge" pass, which merges several
+ global variables into one, saving extra address computation (all the global
+ variables can be accessed via same base address) and potentially reducing
+ register pressure.</li>
+
+<li>The ARM backend has received many minor improvements and tweaks which lead
+ to substantially better performance in a wide range of different scenarios.
+</li>
<li>The ARM NEON intrinsics have been substantially reworked to reduce
redundancy and improve code generation. Some of the major changes are:
</li>
<li>
The llvm.arm.neon.vabdl and llvm.arm.neon.vabal intrinsics (lengthening
- vector absolute difference with and without accumlation) have been removed.
+ vector absolute difference with and without accumulation) have been removed.
They are represented using the llvm.arm.neon.vabd intrinsic (vector absolute
difference) followed by a vector zero-extend operation, and for vabal,
a vector add.
</li>
</ol>
</li>
-</ul>
-</div>
-
-<!--=========================================================================-->
-<div class="doc_subsection">
-<a name="newapis">New Useful APIs</a>
-</div>
-
-<div class="doc_text">
-
-<p>This release includes a number of new APIs that are used internally, which
- may also be useful for external clients.
-</p>
-
-<ul>
-<li></li>
-</ul>
-
-
-</div>
-
-<!--=========================================================================-->
-<div class="doc_subsection">
-<a name="otherimprovements">Other Improvements and New Features</a>
-</div>
-
-<div class="doc_text">
-<p>Other miscellaneous features include:</p>
-<ul>
-<li></li>
</ul>
-
</div>
<ul>
<li>The build configuration machinery changed the output directory names. It
- wasn't clear to many people that "Release-Asserts" build was a release build
+ wasn't clear to many people that a "Release-Asserts" build was a release build
without asserts. To make this more clear, "Release" does not include
assertions and "Release+Asserts" does (likewise, "Debug" and
"Debug+Asserts").</li>
operands are now address-space qualified.
If you were creating these intrinsic calls and prototypes yourself (as opposed
to using Intrinsic::getDeclaration), you can use
- UpgradeIntrinsicFunction/UpgradeIntrinsicCall to be portable accross releases.
+ UpgradeIntrinsicFunction/UpgradeIntrinsicCall to be portable across releases.
</li>
<li>
SetCurrentDebugLocation takes a DebugLoc now instead of a MDNode.
LLVM. The Triple::normalize utility method has been added to help front-ends
deal with funky triples.
</li>
+<li>
+ The signature of the <tt>GCMetadataPrinter::finishAssembly</tt> virtual
+ function changed: the <tt>raw_ostream</tt> and <tt>MCAsmInfo</tt> arguments
+ were dropped. GC plugins which compute stack maps must be updated to avoid
+ having the old definition overload the new signature.
+</li>
+<li>
+ The signature of <tt>MemoryBuffer::getMemBuffer</tt> changed. Unfortunately
+ calls intended for the old version still compile, but will not work correctly,
+ leading to a confusing error about an invalid header in the bitcode.
+</li>
<li>
- Some APIs got renamed:
+ Some APIs were renamed:
<ul>
<li>llvm_report_error -> report_fatal_error</li>
<li>llvm_install_error_handler -> install_fatal_error_handler</li>
</ul>
</li>
+<li>
+ Some public headers were renamed:
+ <ul>
+ <li><tt>llvm/Assembly/AsmAnnotationWriter.h</tt> was renamed
+ to <tt>llvm/Assembly/AssemblyAnnotationWriter.h</tt>
+ </li>
+ </ul>
</ul>
</div>
+<!--=========================================================================-->
+<div class="doc_subsection">
+<a name="devtree_changes">Development Infrastructure Changes</a>
+</div>
+
+<div class="doc_text">
+
+<p>This section lists changes to the LLVM development infrastructure. This
+mostly impacts users who actively work on LLVM or follow development on
+mainline, but may also impact users who leverage the LLVM build infrastructure
+or are interested in LLVM qualification.</p>
+
+<ul>
+ <li>The default for <tt>make check</tt> is now to use
+ the <a href="http://llvm.org/cmds/lit.html">lit</a> testing tool, which is
+ part of LLVM itself. You can use <tt>lit</tt> directly as well, or use
+ the <tt>llvm-lit</tt> tool which is created as part of a Makefile or CMake
+ build (and knows how to find the appropriate tools). See the <tt>lit</tt>
+ documentation and the <a href="http://blog.llvm.org/2009/12/lit-it.html">blog
+ post</a>, and <a href="http://llvm.org/bugs/show_bug.cgi?id=5217">PR5217</a>
+ for more information.</li>
+
+ <li>The LLVM <tt>test-suite</tt> infrastructure has a new "simple" test format
+ (<tt>make TEST=simple</tt>). The new format is intended to require only a
+ compiler and not a full set of LLVM tools. This makes it useful for testing
+ released compilers, for running the test suite with other compilers (for
+ performance comparisons), and makes sure that we are testing the compiler as
+ users would see it. The new format is also designed to work using reference
+ outputs instead of comparison to a baseline compiler, which makes it run much
+ faster and makes it less system dependent.</li>
+
+ <li>Significant progress has been made on a new interface to running the
+ LLVM <tt>test-suite</tt> (aka the LLVM "nightly tests") using
+ the <a href="http://llvm.org/docs/lnt">LNT</a> infrastructure. The LNT
+ interface to the <tt>test-suite</tt> brings significantly improved reporting
+ capabilities for monitoring the correctness and generated code quality
+ produced by LLVM over time.</li>
+</ul>
+</div>
<!-- *********************************************************************** -->
<div class="doc_section">
href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">LLVMdev list</a>.</p>
<ul>
-<li>The Alpha, Blackfin, CellSPU, MicroBlaze, MSP430, MIPS, PIC16, SystemZ
+<li>The Alpha, Blackfin, CellSPU, MicroBlaze, MSP430, MIPS, SystemZ
and XCore backends are experimental.</li>
<li><tt>llc</tt> "<tt>-filetype=obj</tt>" is experimental on all targets
other than darwin-i386 and darwin-x86_64.</li>
4.2. If you are interested in Fortran, we recommend that you consider using
<a href="#dragonegg">dragonegg</a> instead.</p>
-<p>The llvm-gcc 4.2 Ada compiler has basic functionality. However, this is not a
-mature technology, and problems should be expected. For example:</p>
-<ul>
-<li>The Ada front-end currently only builds on X86-32. This is mainly due
-to lack of trampoline support (pointers to nested functions) on other platforms.
-However, it <a href="http://llvm.org/PR2006">also fails to build on X86-64</a>
-which does support trampolines.</li>
-<li>The Ada front-end <a href="http://llvm.org/PR2007">fails to bootstrap</a>.
-This is due to lack of LLVM support for <tt>setjmp</tt>/<tt>longjmp</tt> style
-exception handling, which is used internally by the compiler.
-Workaround: configure with <tt>--disable-bootstrap</tt>.</li>
-<li>The c380004, <a href="http://llvm.org/PR2010">c393010</a>
-and <a href="http://llvm.org/PR2421">cxg2021</a> ACATS tests fail
-(c380004 also fails with gcc-4.2 mainline).
-If the compiler is built with checks disabled then <a href="http://llvm.org/PR2010">c393010</a>
-causes the compiler to go into an infinite loop, using up all system memory.</li>
-<li>Some GCC specific Ada tests continue to crash the compiler.</li>
-<li>The <tt>-E</tt> binder option (exception backtraces)
-<a href="http://llvm.org/PR1982">does not work</a> and will result in programs
-crashing if an exception is raised. Workaround: do not use <tt>-E</tt>.</li>
-<li>Only discrete types <a href="http://llvm.org/PR1981">are allowed to start
-or finish at a non-byte offset</a> in a record. Workaround: do not pack records
-or use representation clauses that result in a field of a non-discrete type
-starting or finishing in the middle of a byte.</li>
-<li>The <tt>lli</tt> interpreter <a href="http://llvm.org/PR2009">considers
-'main' as generated by the Ada binder to be invalid</a>.
-Workaround: hand edit the file to use pointers for <tt>argv</tt> and
-<tt>envp</tt> rather than integers.</li>
-<li>The <tt>-fstack-check</tt> option <a href="http://llvm.org/PR2008">is
-ignored</a>.</li>
-</ul>
+<p>The llvm-gcc 4.2 Ada compiler has basic functionality, but is no longer being
+actively maintained. If you are interested in Ada, we recommend that you
+consider using <a href="#dragonegg">dragonegg</a> instead.</p>
</div>
<!-- *********************************************************************** -->
projects / oota-llvm.git / blobdiff