__raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR));
__raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
- clk_disable(tcd->clk);
+ if (!clockevent_state_detached(d))
+ clk_disable(tcd->clk);
return 0;
}
struct clk *t2_clk = tc->clk[2];
int irq = tc->irq[2];
+ ret = clk_prepare_enable(tc->slow_clk);
+ if (ret)
+ return ret;
+
/* try to enable t2 clk to avoid future errors in mode change */
ret = clk_prepare_enable(t2_clk);
- if (ret)
+ if (ret) {
+ clk_disable_unprepare(tc->slow_clk);
return ret;
+ }
+
clk_disable(t2_clk);
clkevt.regs = tc->regs;
ret = request_irq(irq, ch2_irq, IRQF_TIMER, "tc_clkevt", &clkevt);
if (ret) {
- clk_disable_unprepare(t2_clk);
+ clk_unprepare(t2_clk);
+ clk_disable_unprepare(tc->slow_clk);
return ret;
}