Merge tag 'v3.16-rc6' into next

[firefly-linux-kernel-4.4.55.git] / drivers / cpufreq / imx6q-cpufreq.c

diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index e27fca86fe4f8e22547fa3f90d3bde5cec81fca6..af366c21d4b4032e1471391e97ac800229d12733 100644 (file)
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -9,7 +9,6 @@
 #include <linux/clk.h>
 #include <linux/cpu.h>
 #include <linux/cpufreq.h>
-#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/module.h>
 #include <linux/of.h>
@@ -170,25 +169,25 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
                return -ENOENT;
        }
 
-       arm_clk = devm_clk_get(cpu_dev, "arm");
-       pll1_sys_clk = devm_clk_get(cpu_dev, "pll1_sys");
-       pll1_sw_clk = devm_clk_get(cpu_dev, "pll1_sw");
-       step_clk = devm_clk_get(cpu_dev, "step");
-       pll2_pfd2_396m_clk = devm_clk_get(cpu_dev, "pll2_pfd2_396m");
+       arm_clk = clk_get(cpu_dev, "arm");
+       pll1_sys_clk = clk_get(cpu_dev, "pll1_sys");
+       pll1_sw_clk = clk_get(cpu_dev, "pll1_sw");
+       step_clk = clk_get(cpu_dev, "step");
+       pll2_pfd2_396m_clk = clk_get(cpu_dev, "pll2_pfd2_396m");
        if (IS_ERR(arm_clk) || IS_ERR(pll1_sys_clk) || IS_ERR(pll1_sw_clk) ||
            IS_ERR(step_clk) || IS_ERR(pll2_pfd2_396m_clk)) {
                dev_err(cpu_dev, "failed to get clocks\n");
                ret = -ENOENT;
-               goto put_node;
+               goto put_clk;
        }
 
-       arm_reg = devm_regulator_get(cpu_dev, "arm");
-       pu_reg = devm_regulator_get(cpu_dev, "pu");
-       soc_reg = devm_regulator_get(cpu_dev, "soc");
+       arm_reg = regulator_get(cpu_dev, "arm");
+       pu_reg = regulator_get(cpu_dev, "pu");
+       soc_reg = regulator_get(cpu_dev, "soc");
        if (IS_ERR(arm_reg) || IS_ERR(pu_reg) || IS_ERR(soc_reg)) {
                dev_err(cpu_dev, "failed to get regulators\n");
                ret = -ENOENT;
-               goto put_node;
+               goto put_reg;
        }
 
        /*
@@ -201,21 +200,21 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
                ret = of_init_opp_table(cpu_dev);
                if (ret < 0) {
                        dev_err(cpu_dev, "failed to init OPP table: %d\n", ret);
-                       goto put_node;
+                       goto put_reg;
                }
 
                num = dev_pm_opp_get_opp_count(cpu_dev);
                if (num < 0) {
                        ret = num;
                        dev_err(cpu_dev, "no OPP table is found: %d\n", ret);
-                       goto put_node;
+                       goto put_reg;
                }
        }
 
        ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
        if (ret) {
                dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
-               goto put_node;
+               goto put_reg;
        }
 
        /* Make imx6_soc_volt array's size same as arm opp number */
@@ -301,7 +300,24 @@ soc_opp_out:
 
 free_freq_table:
        dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
-put_node:
+put_reg:
+       if (!IS_ERR(arm_reg))
+               regulator_put(arm_reg);
+       if (!IS_ERR(pu_reg))
+               regulator_put(pu_reg);
+       if (!IS_ERR(soc_reg))
+               regulator_put(soc_reg);
+put_clk:
+       if (!IS_ERR(arm_clk))
+               clk_put(arm_clk);
+       if (!IS_ERR(pll1_sys_clk))
+               clk_put(pll1_sys_clk);
+       if (!IS_ERR(pll1_sw_clk))
+               clk_put(pll1_sw_clk);
+       if (!IS_ERR(step_clk))
+               clk_put(step_clk);
+       if (!IS_ERR(pll2_pfd2_396m_clk))
+               clk_put(pll2_pfd2_396m_clk);
        of_node_put(np);
        return ret;
 }
@@ -310,6 +326,14 @@ static int imx6q_cpufreq_remove(struct platform_device *pdev)
 {
        cpufreq_unregister_driver(&imx6q_cpufreq_driver);
        dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
+       regulator_put(arm_reg);
+       regulator_put(pu_reg);
+       regulator_put(soc_reg);
+       clk_put(arm_clk);
+       clk_put(pll1_sys_clk);
+       clk_put(pll1_sw_clk);
+       clk_put(step_clk);
+       clk_put(pll2_pfd2_396m_clk);
 
        return 0;
 }