#include <linux/dmaengine.h>
#include <linux/interrupt.h>
-#define USE_TIMER
#define MV_XOR_POOL_SIZE PAGE_SIZE
#define MV_XOR_SLOT_SIZE 64
#define MV_XOR_THRESHOLD 1
#define MV_XOR_MAX_CHANNELS 2
+#define MV_XOR_MIN_BYTE_COUNT SZ_128
+#define MV_XOR_MAX_BYTE_COUNT (SZ_16M - 1)
+
/* Values for the XOR_CONFIG register */
#define XOR_OPERATION_MODE_XOR 0
#define XOR_OPERATION_MODE_MEMCPY 2
struct list_head all_slots;
int slots_allocated;
struct tasklet_struct irq_tasklet;
-#ifdef USE_TIMER
- unsigned long cleanup_time;
- u32 current_on_last_cleanup;
-#endif
+ char dummy_src[MV_XOR_MIN_BYTE_COUNT];
+ char dummy_dst[MV_XOR_MIN_BYTE_COUNT];
+ dma_addr_t dummy_src_addr, dummy_dst_addr;
};
/**
* @phys: hardware address of the hardware descriptor chain
* @slot_used: slot in use or not
* @idx: pool index
- * @unmap_src_cnt: number of xor sources
- * @unmap_len: transaction bytecount
* @tx_list: list of slots that make up a multi-descriptor transaction
* @async_tx: support for the async_tx api
- * @xor_check_result: result of zero sum
- * @crc32_result: result crc calculation
*/
struct mv_xor_desc_slot {
struct list_head slot_node;
void *hw_desc;
u16 slot_used;
u16 idx;
- u16 unmap_src_cnt;
- u32 value;
- size_t unmap_len;
struct dma_async_tx_descriptor async_tx;
- union {
- u32 *xor_check_result;
- u32 *crc32_result;
- };
-#ifdef USE_TIMER
- unsigned long arrival_time;
- struct timer_list timeout;
-#endif
};
/*
#define mv_hw_desc_slot_idx(hw_desc, idx) \
((void *)(((unsigned long)hw_desc) + ((idx) << 5)))
-#define MV_XOR_MIN_BYTE_COUNT (128)
-#define XOR_MAX_BYTE_COUNT ((16 * 1024 * 1024) - 1)
-#define MV_XOR_MAX_BYTE_COUNT XOR_MAX_BYTE_COUNT
-
-
#endif