*/
#include <linux/init.h>
+#include <linux/err.h>
#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/basic_mmio_gpio.h>
-struct bgpio_chip {
- struct gpio_chip gc;
-
- unsigned long (*read_reg)(void __iomem *reg);
- void (*write_reg)(void __iomem *reg, unsigned long data);
-
- void __iomem *reg_dat;
- void __iomem *reg_set;
- void __iomem *reg_clr;
-
- /* Number of bits (GPIOs): <register width> * 8. */
- int bits;
-
- /*
- * Some GPIO controllers work with the big-endian bits notation,
- * e.g. in a 8-bits register, GPIO7 is the least significant bit.
- */
- unsigned long (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin);
-
- /*
- * Used to lock bgpio_chip->data. Also, this is needed to keep
- * shadowed and real data registers writes together.
- */
- spinlock_t lock;
-
- /* Shadowed data register to clear/set bits safely. */
- unsigned long data;
-};
-
-static struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
-{
- return container_of(gc, struct bgpio_chip, gc);
-}
-
static void bgpio_write8(void __iomem *reg, unsigned long data)
{
- __raw_writeb(data, reg);
+ writeb(data, reg);
}
static unsigned long bgpio_read8(void __iomem *reg)
{
- return __raw_readb(reg);
+ return readb(reg);
}
static void bgpio_write16(void __iomem *reg, unsigned long data)
{
- __raw_writew(data, reg);
+ writew(data, reg);
}
static unsigned long bgpio_read16(void __iomem *reg)
{
- return __raw_readw(reg);
+ return readw(reg);
}
static void bgpio_write32(void __iomem *reg, unsigned long data)
{
- __raw_writel(data, reg);
+ writel(data, reg);
}
static unsigned long bgpio_read32(void __iomem *reg)
{
- return __raw_readl(reg);
+ return readl(reg);
}
#if BITS_PER_LONG >= 64
static void bgpio_write64(void __iomem *reg, unsigned long data)
{
- __raw_writeq(data, reg);
+ writeq(data, reg);
}
static unsigned long bgpio_read64(void __iomem *reg)
{
- return __raw_readq(reg);
+ return readq(reg);
}
#endif /* BITS_PER_LONG >= 64 */
spin_unlock_irqrestore(&bgc->lock, flags);
}
+static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ return 0;
+}
+
+static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio,
+ int val)
+{
+ gc->set(gc, gpio, val);
+
+ return 0;
+}
+
static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
+ struct bgpio_chip *bgc = to_bgpio_chip(gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&bgc->lock, flags);
+
+ bgc->dir &= ~bgc->pin2mask(bgc, gpio);
+ bgc->write_reg(bgc->reg_dir, bgc->dir);
+
+ spin_unlock_irqrestore(&bgc->lock, flags);
+
return 0;
}
static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
+ struct bgpio_chip *bgc = to_bgpio_chip(gc);
+ unsigned long flags;
+
gc->set(gc, gpio, val);
+ spin_lock_irqsave(&bgc->lock, flags);
+
+ bgc->dir |= bgc->pin2mask(bgc, gpio);
+ bgc->write_reg(bgc->reg_dir, bgc->dir);
+
+ spin_unlock_irqrestore(&bgc->lock, flags);
+
return 0;
}
-static void __iomem *bgpio_request_and_map(struct device *dev,
- struct resource *res)
+static int bgpio_dir_in_inv(struct gpio_chip *gc, unsigned int gpio)
{
- if (!devm_request_mem_region(dev, res->start, resource_size(res),
- res->name ?: "mmio_gpio"))
- return NULL;
+ struct bgpio_chip *bgc = to_bgpio_chip(gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&bgc->lock, flags);
+
+ bgc->dir |= bgc->pin2mask(bgc, gpio);
+ bgc->write_reg(bgc->reg_dir, bgc->dir);
+
+ spin_unlock_irqrestore(&bgc->lock, flags);
+
+ return 0;
+}
+
+static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct bgpio_chip *bgc = to_bgpio_chip(gc);
+ unsigned long flags;
+
+ gc->set(gc, gpio, val);
+
+ spin_lock_irqsave(&bgc->lock, flags);
+
+ bgc->dir &= ~bgc->pin2mask(bgc, gpio);
+ bgc->write_reg(bgc->reg_dir, bgc->dir);
- return devm_ioremap(dev, res->start, resource_size(res));
+ spin_unlock_irqrestore(&bgc->lock, flags);
+
+ return 0;
}
-static int bgpio_setup_accessors(struct platform_device *pdev,
- struct bgpio_chip *bgc)
+static int bgpio_setup_accessors(struct device *dev,
+ struct bgpio_chip *bgc,
+ bool be)
{
- const struct platform_device_id *platid = platform_get_device_id(pdev);
switch (bgc->bits) {
case 8:
break;
#endif /* BITS_PER_LONG >= 64 */
default:
- dev_err(&pdev->dev, "unsupported data width %u bits\n",
- bgc->bits);
+ dev_err(dev, "unsupported data width %u bits\n", bgc->bits);
return -EINVAL;
}
- bgc->pin2mask = strcmp(platid->name, "basic-mmio-gpio-be") ?
- bgpio_pin2mask : bgpio_pin2mask_be;
+ bgc->pin2mask = be ? bgpio_pin2mask_be : bgpio_pin2mask;
return 0;
}
* by clearing a bit. For the set clr pair, this drives a 1 by setting a bit
* in the set register and clears it by setting a bit in the clear register.
* The configuration is detected by which resources are present.
+ *
+ * For setting the GPIO direction, there are three supported configurations:
+ *
+ * - simple bidirection GPIO that requires no configuration.
+ * - an output direction register (named "dirout") where a 1 bit
+ * indicates the GPIO is an output.
+ * - an input direction register (named "dirin") where a 1 bit indicates
+ * the GPIO is an input.
*/
-static int bgpio_setup_io(struct platform_device *pdev,
- struct bgpio_chip *bgc)
+static int bgpio_setup_io(struct bgpio_chip *bgc,
+ void __iomem *dat,
+ void __iomem *set,
+ void __iomem *clr)
{
- struct resource *res_set;
- struct resource *res_clr;
- struct resource *res_dat;
- resource_size_t dat_sz;
- res_dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
- if (!res_dat)
+ bgc->reg_dat = dat;
+ if (!bgc->reg_dat)
+ return -EINVAL;
+
+ if (set && clr) {
+ bgc->reg_set = set;
+ bgc->reg_clr = clr;
+ bgc->gc.set = bgpio_set_with_clear;
+ } else if (set && !clr) {
+ bgc->reg_set = set;
+ bgc->gc.set = bgpio_set_set;
+ } else {
+ bgc->gc.set = bgpio_set;
+ }
+
+ bgc->gc.get = bgpio_get;
+
+ return 0;
+}
+
+static int bgpio_setup_direction(struct bgpio_chip *bgc,
+ void __iomem *dirout,
+ void __iomem *dirin)
+{
+ if (dirout && dirin) {
return -EINVAL;
+ } else if (dirout) {
+ bgc->reg_dir = dirout;
+ bgc->gc.direction_output = bgpio_dir_out;
+ bgc->gc.direction_input = bgpio_dir_in;
+ } else if (dirin) {
+ bgc->reg_dir = dirin;
+ bgc->gc.direction_output = bgpio_dir_out_inv;
+ bgc->gc.direction_input = bgpio_dir_in_inv;
+ } else {
+ bgc->gc.direction_output = bgpio_simple_dir_out;
+ bgc->gc.direction_input = bgpio_simple_dir_in;
+ }
+
+ return 0;
+}
+
+int __devexit bgpio_remove(struct bgpio_chip *bgc)
+{
+ int err = gpiochip_remove(&bgc->gc);
- dat_sz = resource_size(res_dat);
- if (!is_power_of_2(dat_sz))
+ kfree(bgc);
+
+ return err;
+}
+EXPORT_SYMBOL_GPL(bgpio_remove);
+
+int __devinit bgpio_init(struct bgpio_chip *bgc,
+ struct device *dev,
+ unsigned long sz,
+ void __iomem *dat,
+ void __iomem *set,
+ void __iomem *clr,
+ void __iomem *dirout,
+ void __iomem *dirin,
+ bool big_endian)
+{
+ int ret;
+
+ if (!is_power_of_2(sz))
return -EINVAL;
- bgc->bits = dat_sz * 8;
+ bgc->bits = sz * 8;
if (bgc->bits > BITS_PER_LONG)
return -EINVAL;
- bgc->reg_dat = bgpio_request_and_map(&pdev->dev, res_dat);
- if (!bgc->reg_dat)
- return -ENOMEM;
+ spin_lock_init(&bgc->lock);
+ bgc->gc.dev = dev;
+ bgc->gc.label = dev_name(dev);
+ bgc->gc.base = -1;
+ bgc->gc.ngpio = bgc->bits;
+
+ ret = bgpio_setup_io(bgc, dat, set, clr);
+ if (ret)
+ return ret;
- res_set = platform_get_resource_byname(pdev, IORESOURCE_MEM, "set");
- res_clr = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clr");
- if (res_set && res_clr) {
- if (resource_size(res_set) != resource_size(res_clr) ||
- resource_size(res_set) != resource_size(res_dat))
- return -EINVAL;
+ ret = bgpio_setup_accessors(dev, bgc, big_endian);
+ if (ret)
+ return ret;
- bgc->reg_set = bgpio_request_and_map(&pdev->dev, res_set);
- bgc->reg_clr = bgpio_request_and_map(&pdev->dev, res_clr);
- if (!bgc->reg_set || !bgc->reg_clr)
- return -ENOMEM;
+ ret = bgpio_setup_direction(bgc, dirout, dirin);
+ if (ret)
+ return ret;
- bgc->gc.set = bgpio_set_with_clear;
- } else if (res_set && !res_clr) {
- if (resource_size(res_set) != resource_size(res_dat))
- return -EINVAL;
+ bgc->data = bgc->read_reg(bgc->reg_dat);
- bgc->reg_set = bgpio_request_and_map(&pdev->dev, res_set);
- if (!bgc->reg_set)
- return -ENOMEM;
+ return ret;
+}
+EXPORT_SYMBOL_GPL(bgpio_init);
- bgc->gc.set = bgpio_set_set;
- } else {
- bgc->gc.set = bgpio_set;
+#ifdef CONFIG_GPIO_BASIC_MMIO
+
+static void __iomem *bgpio_map(struct platform_device *pdev,
+ const char *name,
+ resource_size_t sane_sz,
+ int *err)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *r;
+ resource_size_t start;
+ resource_size_t sz;
+ void __iomem *ret;
+
+ *err = 0;
+
+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
+ if (!r)
+ return NULL;
+
+ sz = resource_size(r);
+ if (sz != sane_sz) {
+ *err = -EINVAL;
+ return NULL;
}
- bgc->gc.get = bgpio_get;
+ start = r->start;
+ if (!devm_request_mem_region(dev, start, sz, r->name)) {
+ *err = -EBUSY;
+ return NULL;
+ }
- return 0;
+ ret = devm_ioremap(dev, start, sz);
+ if (!ret) {
+ *err = -ENOMEM;
+ return NULL;
+ }
+
+ return ret;
}
-static int __devinit bgpio_probe(struct platform_device *pdev)
+static int __devinit bgpio_pdev_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- struct bgpio_pdata *pdata = dev_get_platdata(dev);
+ struct resource *r;
+ void __iomem *dat;
+ void __iomem *set;
+ void __iomem *clr;
+ void __iomem *dirout;
+ void __iomem *dirin;
+ unsigned long sz;
+ bool be;
+ int err;
struct bgpio_chip *bgc;
- int ret;
- int ngpio;
+ struct bgpio_pdata *pdata = dev_get_platdata(dev);
+
+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
+ if (!r)
+ return -EINVAL;
+
+ sz = resource_size(r);
+
+ dat = bgpio_map(pdev, "dat", sz, &err);
+ if (!dat)
+ return err ? err : -EINVAL;
+
+ set = bgpio_map(pdev, "set", sz, &err);
+ if (err)
+ return err;
+
+ clr = bgpio_map(pdev, "clr", sz, &err);
+ if (err)
+ return err;
- bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL);
+ dirout = bgpio_map(pdev, "dirout", sz, &err);
+ if (err)
+ return err;
+
+ dirin = bgpio_map(pdev, "dirin", sz, &err);
+ if (err)
+ return err;
+
+ be = !strcmp(platform_get_device_id(pdev)->name, "basic-mmio-gpio-be");
+
+ bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL);
if (!bgc)
return -ENOMEM;
- ret = bgpio_setup_io(pdev, bgc);
- if (ret)
- return ret;
+ err = bgpio_init(bgc, dev, sz, dat, set, clr, dirout, dirin, be);
+ if (err)
+ return err;
- ngpio = bgc->bits;
if (pdata) {
bgc->gc.base = pdata->base;
if (pdata->ngpio > 0)
- ngpio = pdata->ngpio;
- } else {
- bgc->gc.base = -1;
+ bgc->gc.ngpio = pdata->ngpio;
}
- ret = bgpio_setup_accessors(pdev, bgc);
- if (ret)
- return ret;
-
- spin_lock_init(&bgc->lock);
- bgc->data = bgc->read_reg(bgc->reg_dat);
-
- bgc->gc.ngpio = ngpio;
- bgc->gc.direction_input = bgpio_dir_in;
- bgc->gc.direction_output = bgpio_dir_out;
- bgc->gc.dev = dev;
- bgc->gc.label = dev_name(dev);
-
platform_set_drvdata(pdev, bgc);
- ret = gpiochip_add(&bgc->gc);
- if (ret)
- dev_err(dev, "gpiochip_add() failed: %d\n", ret);
-
- return ret;
+ return gpiochip_add(&bgc->gc);
}
-static int __devexit bgpio_remove(struct platform_device *pdev)
+static int __devexit bgpio_pdev_remove(struct platform_device *pdev)
{
struct bgpio_chip *bgc = platform_get_drvdata(pdev);
- return gpiochip_remove(&bgc->gc);
+ return bgpio_remove(bgc);
}
static const struct platform_device_id bgpio_id_table[] = {
.name = "basic-mmio-gpio",
},
.id_table = bgpio_id_table,
- .probe = bgpio_probe,
- .remove = __devexit_p(bgpio_remove),
+ .probe = bgpio_pdev_probe,
+ .remove = __devexit_p(bgpio_pdev_remove),
};
-static int __init bgpio_init(void)
+static int __init bgpio_platform_init(void)
{
return platform_driver_register(&bgpio_driver);
}
-module_init(bgpio_init);
+module_init(bgpio_platform_init);
-static void __exit bgpio_exit(void)
+static void __exit bgpio_platform_exit(void)
{
platform_driver_unregister(&bgpio_driver);
}
-module_exit(bgpio_exit);
+module_exit(bgpio_platform_exit);
+
+#endif /* CONFIG_GPIO_BASIC_MMIO */
MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");
MODULE_AUTHOR("Anton Vorontsov <cbouatmailru@gmail.com>");
projects / firefly-linux-kernel-4.4.55.git / blobdiff