drm: bridge/dw-hdmi: add support for hdmi bitstream audio
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / bridge / dw-hdmi-i2s-audio.c
index 84c2a316aac395ebe942735fddf1dbb25ccfc15b..d4ad3f0014e7ef0db628f70ad6f076eca3e3b196 100644 (file)
@@ -30,6 +30,14 @@ static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
        return audio->read(hdmi, offset);
 }
 
+static inline void hdmi_update_bits(struct dw_hdmi_i2s_audio_data *audio,
+                                   u8 data, u8 mask, unsigned int reg)
+{
+       struct dw_hdmi *hdmi = audio->hdmi;
+
+       audio->mod(hdmi, data, mask, reg);
+}
+
 static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
                                 struct hdmi_codec_daifmt *fmt,
                                 struct hdmi_codec_params *hparms)
@@ -39,6 +47,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
        u8 conf0 = 0;
        u8 conf1 = 0;
        u8 inputclkfs = 0;
+       u8 val;
 
        /* it cares I2S only */
        if ((fmt->fmt != HDMI_I2S) ||
@@ -47,7 +56,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
                return -EINVAL;
        }
 
-       inputclkfs      = HDMI_AUD_INPUTCLKFS_64FS;
+       inputclkfs = HDMI_AUD_INPUTCLKFS_128FS;
 
        switch (hparms->sample_width) {
        case 16:
@@ -80,19 +89,112 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
                return -EINVAL;
        }
 
-       dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
-
-       hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
-       hdmi_write(audio, conf0, HDMI_AUD_CONF0);
-       hdmi_write(audio, conf1, HDMI_AUD_CONF1);
        /*
         * dw-hdmi introduced insert_pcuv bit in version 2.10a.
         * When set (1'b1), this bit enables the insertion of the PCUV
         * (Parity, Channel Status, User bit and Validity) bits on the
         * incoming audio stream (support limited to Linear PCM audio)
         */
-       if (hdmi_read(audio, HDMI_DESIGN_ID) > 0x21)
-               hdmi_write(audio, HDMI_AUD_CONF2_INSERT_PCUV, HDMI_AUD_CONF2);
+       val = 0;
+       if (hdmi_read(audio, HDMI_DESIGN_ID) >= 0x21)
+               val = HDMI_AUD_CONF2_INSERT_PCUV;
+
+       /*Mask fifo empty and full int and reset fifo*/
+       hdmi_update_bits(audio,
+                        HDMI_AUD_INT_FIFO_EMPTY_MSK |
+                        HDMI_AUD_INT_FIFO_FULL_MSK,
+                        HDMI_AUD_INT_FIFO_EMPTY_MSK |
+                        HDMI_AUD_INT_FIFO_FULL_MSK, HDMI_AUD_INT);
+       hdmi_update_bits(audio, HDMI_AUD_CONF0_SW_RESET,
+                        HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
+       hdmi_update_bits(audio, HDMI_MC_SWRSTZ_I2S_RESET_MSK,
+                        HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ);
+
+       switch (hparms->mode) {
+       case NLPCM:
+               hdmi_write(audio, HDMI_AUD_CONF2_NLPCM, HDMI_AUD_CONF2);
+               conf1 = HDMI_AUD_CONF1_WIDTH_21;
+               break;
+       case HBR:
+               hdmi_write(audio, HDMI_AUD_CONF2_HBR, HDMI_AUD_CONF2);
+               conf1 = HDMI_AUD_CONF1_WIDTH_21;
+               break;
+       default:
+               hdmi_write(audio, val, HDMI_AUD_CONF2);
+               break;
+       }
+
+       dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
+
+       hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
+       hdmi_write(audio, conf0, HDMI_AUD_CONF0);
+       hdmi_write(audio, conf1, HDMI_AUD_CONF1);
+
+       val = HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0;
+       if (hparms->channels > 2)
+               val = HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1;
+       hdmi_update_bits(audio, val, HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK,
+                        HDMI_FC_AUDSCONF);
+
+       switch (hparms->sample_rate) {
+       case 32000:
+               val = HDMI_FC_AUDSCHNLS_32K;
+               break;
+       case 44100:
+               val = HDMI_FC_AUDSCHNLS_441K;
+               break;
+       case 48000:
+               val = HDMI_FC_AUDSCHNLS_48K;
+               break;
+       case 88200:
+               val = HDMI_FC_AUDSCHNLS_882K;
+               break;
+       case 96000:
+               val = HDMI_FC_AUDSCHNLS_96K;
+               break;
+       case 176400:
+               val = HDMI_FC_AUDSCHNLS_1764K;
+               break;
+       case 192000:
+               val = HDMI_FC_AUDSCHNLS_192K;
+               break;
+       default:
+               val = HDMI_FC_AUDSCHNLS_441K;
+               break;
+       }
+
+       /* set channel status register */
+       hdmi_update_bits(audio, val,
+                        HDMI_FC_AUDSCHNLS7_SAMPFREQ_MASK,
+                        HDMI_FC_AUDSCHNLS7);
+       hdmi_write(audio,
+                  ((~val) << HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET),
+                  HDMI_FC_AUDSCHNLS8);
+
+       /* Refer to CEA861-E Audio infoFrame
+        * Set both Audio Channel Count and Audio Coding
+        * Type Refer to Stream Head for HDMI
+        */
+       hdmi_update_bits(audio,
+                        (hparms->channels - 1) << HDMI_FC_AUDICONF0_CC_OFFSET,
+                        HDMI_FC_AUDICONF0_CC_MASK, HDMI_FC_AUDICONF0);
+
+       /* Set both Audio Sample Size and Sample Frequency
+        * Refer to Stream Head for HDMI
+        */
+       hdmi_write(audio, 0x00, HDMI_FC_AUDICONF1);
+
+       /* Set Channel Allocation */
+       hdmi_write(audio, 0x00, HDMI_FC_AUDICONF2);
+
+       /* Set LFEPBLDOWN-MIX INH and LSV */
+       hdmi_write(audio, 0x00, HDMI_FC_AUDICONF3);
+
+       hdmi_update_bits(audio, HDMI_AUD_CONF0_SW_RESET,
+                        HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
+       hdmi_update_bits(audio, HDMI_MC_SWRSTZ_I2S_RESET_MSK,
+                        HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ);
+
        dw_hdmi_audio_enable(hdmi);
 
        return 0;